Features

  • AVR Microcontroller Core with 1-Kbyte SRAM and 24-Kbyte RF Library in Firmware (ROM)
  • ATA8210 – 20-Kbyte of user Flash
  • ATA8215 – No user memory – RF Library in Firmware only
  • Supported Frequency Ranges:
    • Low-band – 310-318 MHz, 418-477 MHz
    • High-band – 836-956 MHz
    • 315.00 MHz/433.92 MHz/868.30 MHz and 915.00 MHz with one 24.305 MHz crystal
  • Low Current Consumption
    • 9.8 mA for RXMode (Low-band), 1.2 mA for 21 ms cycle three-channel polling
  • Typical OFFMode Current of 5 nA (Maximum 600 nA at Vs = 3.6V and T = 85°C)
  • Supports the 0 dBm Class of ARIB STD-T96
  • Input 1 dB Compression Point
    • -48 dBm (full sensitivity level)
    • -20 dBm (active antenna damping)
  • Programmable Channel Frequency with fractional-N PLL
    • 93 Hz resolution for Low-band
    • 185 Hz resolution for High-band
  • FSK Deviation ±0.375 kHz to ±93 kHz
  • FSK Sensitivity (Manchester Coded) at 433.92 MHz
    • -108.5 dBm at 20 Kbit/s, Δf = ±20 kHz and BWIF = 165 kHz
    • -111 dBm at 10 Kbit/s, Δf = ±10 kHz and BWIF = 165 kHz
    • -114 dBm at 5 Kbit/s, Δf = ±5 kHz and BWIF = 165 kHz
    • -122.5 dBm at 0.75 Kbit/s, Δf = ±0.75 kHz and BWIF = 25 kHz
  • ASK Sensitivity (Manchester Coded) at 433.92 MHz
    • -110.5 dBm at 20 Kbit/s and BWIF = 80 kHz
    • -125 dBm at 0.5 Kbit/s and BWIF = 25 kHz
  • Programmable RX-IF Bandwidth 25-366 kHz (Approximately 10% steps)
  • Blocking (BWIF = 165 kHz): 64 dBc at Frequency Offset = 1 MHz and 48 dBc at 225 kHz
  • High Image Rejection: 55 dB at 315 MHz/433.92 MHz and 47 dB at 868.3 MHz/915 MHz without Calibration
  • Supported Data Rate in Buffered Mode 0.5-80 Kbit/s (120 Kbit/s NRZ)
  • Supports Pattern-based Wake-up and Start of Frame Identification
  • Flexible Service Configuration Concept with On-the-Fly (OTF) Modification (in IDLEMode) of SRAM Service Parameters (Data Rate and more)
    • Each service consists of the following:
      • One service-specific configuration part
      • Three channel-specific configuration parts
    • Three service configurations are located in EEPROM
    • Modify two service configurations in SRAM via SPI or embedded application software
  • The Digitized IF Processing helps to achieve the Digital RSSI with very High Relative Accuracy of ±1 dB
  • Programmable Clock Output derived from Crystal Frequency
  • 1024-byte EEPROM Data Memory for Receiver Configuration
  • SPI Interface for RX Data Access and Receiver Configuration
  • 500-Kbit SPI Data Rate for Short Periods on the SPI Bus and Host Controller
  • On-demand Services (SPI or API) without Interruption on Polling or Telegram Reception
  • Integrated Temperature Sensor
  • Self-check and Calibration with Temperature Measurement
  • Configurable EVENT Signal Indicates the Status of the IC to an External Microcontroller
  • Automatic Low-power Channel Polling
  • Flexible Polling Configuration Concerning Timing, Order and Participating Channels
  • Fast reaction time
  • Power-up (typical 1.5 ms OFFMode to RXMode)
  • Supports Mixed ASK/FSK Telegrams
  • Non-byte Aligned Data Reception
  • Software Customization
  • Antenna Diversity with External Switch via GPIO Control
  • Antenna Diversity with Internal SPDT Switch
  • Supply Voltage Ranges from 1.9-3.6V and 2.4-5.5V
  • Temperature Range: -40°C to +85°C
  • ESD Protection at All Pins (±4 kV HBM, ±200V MM, ±750V FCDM)
  • Small 5 x 5 mm QFN32 Package/Pitch 0.5 mm
  • Suitable for Applications Governed by EN 300 220 and FCC Part 15, Title 47