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PIC16F15256/74/75/76 28/40-Pin Microcontrollers PIC16F15256/74/75/76
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16
I/O Ports
PIC16F15256/74/75/76
Introduction
PIC16F152
Family Types
Core Features
1
Packages
2
Pin Diagrams
3
Pin Allocation Tables
4
Guidelines for Getting Started with
PIC16F152
Microcontrollers
5
Register and Bit Naming Conventions
6
Register Legend
7
Enhanced Mid-Range CPU
8
Device Configuration
9
Memory Organization
10
Resets
11
OSC - Oscillator Module
12
Interrupts
13
Sleep Mode
14
WDT - Watchdog Timer
15
NVM - Nonvolatile Memory Control
16
I/O Ports
16.1
Overview
16.2
PORTx - Data Register
16.3
LATx - Output Latch
16.4
TRISx - Direction Control
16.5
ANSELx - Analog Control
16.6
WPUx - Weak Pull-Up Control
16.7
INLVLx - Input Threshold Control
16.8
SLRCONx - Slew Rate Control
16.9
ODCONx - Open-Drain Control
16.10
Edge Selectable Interrupt-on-Change
16.11
I
2
C Pad Control
16.12
I/O Priorities
16.13
MCLR
/V
PP
/RE3
Pin
16.14
Register Definitions: Port Control
16.15
Register Summary - IO Ports
17
IOC - Interrupt-on-Change
18
PPS - Peripheral Pin Select Module
19
TMR0 - Timer0 Module
20
TMR1 - Timer1 Module with Gate Control
21
TMR2 - Timer2 Module
22
CCP - Capture/Compare/PWM Module
23
PWM - Pulse-Width Modulation
24
EUSART - Enhanced Universal Synchronous Asynchronous Receiver Transmitter
25
MSSP - Host Synchronous Serial Port Module
26
FVR - Fixed Voltage Reference
27
ADC - Analog-to-Digital Converter
28
Charge Pump
29
Instruction Set Summary
30
ICSP™ - In-Circuit Serial Programming™
31
Register Summary
32
Electrical Specifications
33
DC and AC Characteristics Graphs and Tables
34
Packaging Information
35
Appendix A: Revision History
Microchip Information
16 I/O Ports