Figure 40-130. Falling Edge
Response Time vs. VDD (VCM =
VDD/2, CTRLA.POWER =
0x00)
Figure 40-131. Rising Edge
Response Time vs. VDD (VCM =
VDD/2, CTRLA.POWER =
0x00)
Figure 40-132. Falling Edge
Response Time vs. VDD (VCM =
VDD/2, CTRLA.POWER =
0x01)
Figure 40-133. Rising Edge
Response Time vs. VDD (VCM =
VDD/2, CTRLA.POWER =
0x01)
Figure 40-134. Falling Edge
Response Time vs. VDD (VCM =
VDD/2, CTRLA.POWER =
0x02)
Figure 40-135. Rising Edge
Response Time vs. VDD (VCM =
VDD/2, CTRLA.POWER =
0x02)
Figure 40-136. Input Offset
vs. Common Mode Voltage (VDD = 2.0V)
Figure 40-137. Input
Hysteresis vs. Common Mode Voltage (VDD =
2.0V)
Figure 40-138. Input Offset
vs. Common Mode Voltage (VDD = 3.0V)
Figure 40-139. Input
Hysteresis vs. Common Mode Voltage (VDD =
3.0V)
Figure 40-140. Input Offset
vs. Common Mode Voltage (VDD = 5.5V)
Figure 40-141. Input
Hysteresis vs. Common Mode Voltage (VDD =
5.5V)
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