3.1 Multi-Protocol Translator

As many industries transition from traditional I²C/SMBus-based communication to a faster I3C-based communication, system designers are looking for ways to maintain backward compatibility. While the I3C protocol is designed to be backward-compatible with I²C/SMBus protocols, the presence of an I²C/SMBus device on an I3C bus can severely impact the performance of the bus even when the controller optimizes the transactions to communicate to I3C devices.

In such scenarios, when it is not possible to have a pure I3C bus, the I3C module on the 8-bit PIC microcontrollers can be used to isolate the I²C/SMBus devices from the I3C bus and act as a bridge device, as shown in Figure 3-1. This maintains the integrity of the pure I3C bus while still allowing the controller to communicate to the I²C/SMBus devices through the PIC microcontroller.

As an added benefit, since the I²C/SMBus devices use external signals for interrupts, the PIC microcontroller can also consolidate the interrupts from all the I²C/SMBus devices and relay them to the I3C controller using In-Band Interrupts without any extra pins/signals. In addition, the MVIO on the PIC microcontroller allows the I3C and I²C/SMBus buses to operate at different bus voltages. For instance, the I3C bus can operate at 1V, whereas the I²C/SMBus bus can continue to operate at a higher 3.3V to be compatible with the I²C/SMBus devices.

Since the PIC microcontrollers also contain a SPI module, the device can also act as an I3C-to-SPI bridge if needed. This can be useful when an external SPI-based memory module or sensor needs to be added to the bus.

For a multi-protocol translator application the I3C module is configured in Target mode, whereas the I²C/SPI modules are configured in Controller/Host mode. The user can write custom firmware or use DMA to read/write data across the I3C and I²C/SPI modules and the GPR space.

Find the MCC Melody code configuration here: