3.4 Memory Controller SidebandBus Communication

To cater to the system management needs for the next generation DDR5 memory modules and beyond, the JEDEC® group has introduced the JEDEC Module Sideband Bus (SidebandBus) based of the I3C protocol. The SidebandBus protocol can be downloaded from the JEDEC website. The 8-bit PIC microcontrollers with the I3C module can be connected to the SidebandBus as a generic I3C device that meets the interoperability considerations and the speed and voltage requirements, as mentioned in the JEDEC specification.

Many types of devices can be connected to the SidebandBus in a memory controller application, such as a Registering Clock Device (RCD), Power Management ICs (PMICs), Temperature Sensors (TS), and a Serial Presence Detect (SPD) device, which also acts as a SidebandBus hub. The 8-bit PIC microcontrollers can sit on the SidebandBus both on the Host bus (before the hub) or the Local bus (behind the hub) to assist with system and power management. One such example featuring various products from the Microchip portfolio in Registered Dual In-line Memory Modules (RDIMMs) is shown in Figure 3-4.

Figure 3-4. Memory Controller SidebandBus in RDIMMs Using PIC18-Q20