1.2 Possible Solutions

The most accurate measurement will consist of the fastest clock source with a timer on the lowest prescale. The lowest timer prescale yields the highest resolution. Higher resolution typically increases the maximum count, which may necessitate compensation for rollover of the timer.

An interrupt can be incorporated into these routines only if non blocking code is used. The accuracy of this implementation may suffer as a result. For example, the Interrupt-on-Change (IOC) pin can cause an interrupt when a rising or falling edge is detected. The pulse measurement can now be completed inside of the ISR without the need to constantly poll the pin. While this may sound ideal, the user must now accommodate for the 3-5 instruction cycle delay that is caused by servicing an asynchronous interrupt.

When absolute accuracy is important, then an external crystal should be used since the internal oscillator block can have a drift up to 5% of its nominal frequency.

All of the measurements in this document including the associated code use an internal 16 MHz system clock with all timers on a 1:1 prescale of the system clock (FOSC), unless otherwise noted. The low and high waveform length constraints, as well as the accuracy of the measured result are calculated using Table   1 and Table   2. If rollover is accounted for in software-based methods, then the accuracy of the measurement will decrease in proportion to the software routine overhead.

These methods assume a pulse to be active-high and a period to be the time between two rising edges. See Figure   1 and Figure   2 for clarification. A generic duty cycle equation (Figure   3) is also provided based on Figure   1 and Figure   2. There are more method-based equations later in the document.

Figure 1-2. Pulse Width Definition
Figure 1-3. Duty Cycle is the Ratio of Pulse Width and Period
Equation 1-1. Generic Duty Cycle Equation
d u t y _ c y c l e = ( T 2 T 1 ) ( T 3 T 1 ) * 100 %
Table 1-1. Associated Code Numbers
Solution Modules PIC MCU Interrupt Language *Limit High Resolution
Pulse Measurements – Code Numbers
Timer1 Gate Timer1 Gate PIC16F18076 Yes C 4.1 ms 62.5 ns
Timer1
CLC and NCO CLC1/2(/3) PIC16F18076 Yes C 65.54 ms 62.5 ns
NCO1
CCP CCP1 PIC16F18076 Yes C 16.38 ms 250 ns
Timer1/3
IOC with Timer IOC/INT PIC16F18076 Yes C 1 ms

250 ns

Timer0
IOC without Timer IOC PIC16F18076 Yes C 4.194s 2.75 μs
Polled Input Polled Input PIC16F18076 No C 4.194s 2.5 μs
Duty Cycle Measurements – Code Numbers
Timer1 Gate Timer1 Gate PIC16F18076 Yes C 4.1 ms 125 ns
Timer1
CLC and NCO CLC PIC16F18076 Yes C 65.54 ms 62.5 ns
NCO1
CCP CCP1 PIC16F18076 Yes C 16.38 ms 250 ns
Timer1/3
IOC with Timer IOC/INT PIC16F18076 Yes C 1 ms 250 ns
TimerX
IOC without Timer IOC PIC16F18076 Yes C 4.194s 5.5 μs
Polled Input Polled Input PIC16F18076 No C 4.194s 5 μs

*The upper limit on these calculations can be extended to any set amount. The limit that is represented in this table reflects a single timer rollover.

Table 1-2. Equations used for the Results shown in the ‘Associated Code Numbers’ table
Solution Modules Limit High Resolution
Pulse Measurement – Equations
Timer1 Gate Timer1 Gate ( 1 f ) * 2 n 1 f
Timer1
CLC and NCO CLC1/2(/3) ( 4 f ) * 2 n

n = NCO ACCUM bit width

1 f
NCO1
TimerX
CCP CCP1 ( 1 f ) * 2 n Software dependent
Timer1/3
IOC with Timer IOC/INT ( 1 f ) * 2 n * 4 Software dependent (16x prescaler)
Timer0
IOC without Timer IOC ( 4 f ) * 2 n Software dependent
Polled Input None ( 4 f ) * 2 n Software dependent
Duty Cycle Measurements – Equations
Timer1 Gate Timer1 Gate ( 1 f ) * 2 n 1 f
Timer1
CLC and NCO CLC1/2(/3) ( 1 f ) * 2 n

n = NCO ACCUM bit width

1 f
NCO1
TimerX
CCP CCP1/2 ( 4 f ) * 2 n Software dependent
Timer 1/3
IOC with Timer IOC/INT ( 1 f ) * 2 n * 4 Software dependent (16x prescaler)
Timer0
IOC without Timer IOC ( 4 f ) * 2 n Software dependent
Polled Input None ( 4 f ) * 2 n Software dependent

n = TimerX bit width

f = Clock Frequency