3.4 PLCA Configuration Process - Revision C2

Enabling PLCA

When using PLCA, the node with the Node_ID 0 is called the PLCA coordinator. For the PLCA coordinator, the number of transmit opportunities, which is the maximum Node_ID used in the mixing segment plus 1, must be written into the PLCA Control 1 (PLCA_CTRL1, Address = 0xCA02) register.

Nodes with IDs ranging between 1 and 0xFE are called PLCA followers. These nodes only require their Node_ID to be written into the field of PLCA_CTRL1.

Once the number of transmit opportunities and Node_ID have been written, enable PLCA by writing a ‘1’ into the PLCA Enable (EN) bit in the PLCA Control 0 (PLCA_CTRL0, Address = 0xCA01) register.

The following code configures the device as either a PLCA coordinator or PLCA follower depending on the device's corresponding Node ID.

uint8 Node_ID
uint8 Node_Count
uint16 plcaparam1
Node_Count = MAX_NODE_ID + 1
if(Node_ID == 0)
{
     plcaparam1 = (uint16)(Node_Count << 8)
}
else
{
     plcaparam1 = (uint16) Node_ID
}

In many cases, as described above, collision detection should be disabled by writing a ‘0’ into the Collision Detection Enable (CDEN) bit of the Collision Detection Control 0 (CDCTL0, Address = 0x0087) register.

This sequence is summarized in Table 3-3.

Managing Collision Detection

When configured for PLCA operation, it may be advantageous to disable collision detection. Should the device not detect the periodic presence of a PLCA BEACON, it will automatically fall back to CSMA/CD operation to keep communications running. Whenever PLCA is active, the PLCA Status (PST) bit in the PLCA Status (PLCA_STS, Address = 0xCA03) register is set by hardware and changes from a ‘0’ to a ‘1’. Similarly, whenever the PLCA BEACON is lost and the device falls back to CSMA/CD operation, the bit changes from a ‘1’ to a ‘0’. Whenever these changes occur, a ‘1’ is set in the PLCA Status Changed (PSTC) bit in the Status 1 (STS1, Address = 0x0018) register. This flag is used to indicate that the activity status of PLCA has changed since the last read of the register.

When disabling collision detection while PLCA is active, it is necessary to manually re-enable it during the CSMA/CD fallback. The best way to do this is to enable an interrupt to notify the microcontroller whenever a PLCA status change has occurred. This is done by writing a '0' into the PLCA Status Changed Mask (PSTCM) bit in the Interrupt Mask 1 (IMSK1, Address = 0x001C) register. Alternatively, if no interrupts are being used, the device can be polled regularly. This can, however, lead to reduced performance.

Whenever an interrupt is triggered through the IRQ_N pin or a poll occurs, the STS1 register should be read. If the PLCA Status Changed (PSTC) bit is set, then collision detection should be enabled or disabled as shown in Figure 3-1. During the handling of this interrupt or poll, the PLCA_STS register will indicate if PLCA is currently active or not. If PLCA is currently active, as indicated by reading the PLCA Status bit as ‘1’, collision detection is disabled by clearing the Collision Detection Enable (CDEN) bit in the Collision Detect Control 0 (CDCTL0, Address = 0x0087) register. When the PLCA Status bit is read as ‘0’, indicating that PLCA is inactive and the device is operating in CSMA/CD, then collision detection is enabled by writing a ‘1’ to the CDEN bit.

Disabling PLCA

In some cases, it may be desired to force the device to remain in CSMA/CD mode. To do this, disable PLCA in the PLCA_CTRL0 register and enable collision detect in the CDCTL0 register.