Silicon Issue Summary
| Module | Feature | Item No. | Issue Summary | Affected Revisions | ||
|---|---|---|---|---|---|---|
| A1 | A2 | A4 | ||||
| Analog-to-Digital Converter With Computation (ADCC) | ADCC Burst Average mode | ADCC Burst Average Mode | ADCC Burst Average mode while in "Non-Continuous Double Sample" mode may not operate as intended | X | X | - |
| Double Sample Conversion | Double Sample Conversions | An unexpected acquisition time is added between the first and second conversions | X | X | X | |
| I2C | Start and Stop Interrupt Functions | The I2C Start and/or Stop Flags May Be Set When I2C Is Enabled | A race condition can cause the Start and/or Stop flags to be set when I2C is enabled | X | X | X |
| Electrical Specifications | Minimum VDD Specification | Min VDD Specification (LF Devices Only) | VDD Min. specifications are changed for LF devices only | X | X | X |
| MSSP | SPI | MSSP SPI Client Mode | SSPBUF may become corrupted | X | - | - |
| NVM | WRERR bit Operation | WRERR Bit Operation | NVMERR bit is set by device Reset after being cleared by software | X | - | - |
| Program Flash Memory (PFM) | PFM Endurance | Endurance of PFM is Lower than Specified | The PFM endurance is lower than specified | X | X | X |
| Back to Back Writes | PFM Back to Back Writes | Repetitive writes may cause write/erase failures | X | X | - | |
| Capture/Compare/PWM (CCP) | PWM mode | Wrong Duty Cycle for CCP Module | Duty cycle values are incorrect | X | X | - |
| Signal Measurement Timer (SMT) | Reset Bit | Reset Bit | Module stops working if RST is set while prescaler setting is not zero | X | X | X |
| Universal Asynchronous Receiver Transmitter (UART) | Synchronous Mode Transmissions | Synchronous Mode Transmissions | Loss of second byte written in TXREG | X | X | - |
| Transmit mode | Double Byte Transmit | Double byte transmit | X | X | - | |
| Windowed Watchdog Timer | Window Operation | Window Operation in Doze Mode | Window feature of the WWDT does not operate correctly in DOZE mode | X | - | - |
| Device Configuration | CONFIG2 | PWRTS[1] Power-up Timer Selection Not Implemented |
Bit 2 of PWRTS[1:0] in the CONFIG2 register is not functional | X | - | - |
|
Note: Only those issues
indicated in the last column apply to the current silicon
revision.
| ||||||