5.1 System-level Hardware Safety Requirements

Microchip system knowledge and experience were used in determining the Hardware Safety Requirements (HWSR) for the compliance items specified in this section. The list of hardware requirements in the table below represents a superset of hardware requirements that shall be considered by the System Integrator when using the device for a specific application.

It is the responsibility of the System Integrator to check the compliance of the final application with these assumptions.

Table 5-1. Hardware Safety Requirements (HWSR)
Requirement ID	Test	Requirement Body
AoU-09 Power Supply Design	Check power supply design and operation	All supplies should have proper bypass caps.
AoU-10 Clock Output Design	Check presence and quality of clock signals	All clock input and output signals should be properly terminated according to their signal format, and clock signal integrity preserved at the loads.
AoU-11 SPI/I²C and GPIO	Monitor clock signals	Device I²C or SPI interface should be connected to an SoC that will read APLL status, reference input monitor status, and DPLL status as needed for the application.