4.3.2.4 Data Input Bit Frame

A data input bit frame can be used by the host to transmit either a logic ‘0’ or a logic ‘1’ data bit to the ECC204-TFLXAUTH. The input bit frame is initiated when the host drives the SI/O line low. The length of time that the SI/O line is held low will dictate whether the host is transmitting a logic ‘0’ or a logic ‘1’ for that bit frame. For a logic ‘0’ input, the length of time that the SI/O line must be held low is defined as tLOW0. Similarly, for a logic ‘1’ input, the length of time that the SI/O line must be held low is defined as tLOW1.

The ECC204-TFLXAUTH will sample the state of the SI/O line after the maximum tLOW1 but prior to the minimum tLOW0 after SI/O is driven below the VIL threshold to determine if the data input is a logic ‘0’ or a logic ‘1’. If the host is still driving the line low at the sample time, the ECC204-TFLXAUTH will decode that bit frame as a logic ‘0’ as SI/O will be at a voltage less than VIL. If the host has already released the SI/O line, the ECC204-TFLXAUTH sees a voltage level greater than or equal to VIH because of the external pull-up resistor, and that bit frame is decoded as a logic ‘1’.

A logic ‘0’ condition has multiple uses similar to I2C sequences. It is used to signify a ‘0’ data bit and it is also used for an ACK response. Additionally, a logic ‘1’ condition is used for a NACK response in addition to the nominal ‘1’ data bit.

The figures below depict the logic ‘0’ and logic ‘1’ input bit frames.

Figure 4-12. Logic ‘0’ Input Condition Waveform
Figure 4-13. Logic ‘1’ Input Condition Waveform