18.2 PPS Inputs
Each digital peripheral has a dedicated PPS Peripheral Input Selection (xxxPPS) register with which the input pin to the peripheral is selected. Devices that have 20 leads or less (8/14/16/20) allow PPS routing to any I/O pin, while devices with 28 leads or more allow PPS routing to I/Os contained within two ports (see the table below).
Multiple peripherals can operate from the same source simultaneously. Port reads always return the pin level regardless of peripheral PPS selection. If a pin also has analog functions associated, the ANSEL bit for that pin must be cleared to enable the digital input buffer.
Peripheral | PPS Input Register | Default Pin Selection at POR | |
---|---|---|---|
14/16-Pin Devices | 20-Pin Devices | ||
External Interrupt | INTPPS | RA2 | |
Timer0 Clock | T0CKIPPS | RA2 | |
Timer1 Clock | T1CKIPPS | RA5 | |
Timer1 Gate | T1GPPS | RA4 | |
Timer2 Input | T2INPPS | RA5 | |
CCP1 | CCP1PPS | RC5 | RC5 |
CCP2 | CCP2PPS | RC3 | RC3 |
SCL1/SCK1 | SSP1CLKPPS(1) | RC0 | RB4 |
SDA1/SDI1 | SSP1DATPPS(1) | RC1 | RB6 |
SS1 | SSP1SSPPS | RC3 | RC6 |
RX1/DT1 | RX1PPS | RC5 | RB5 |
CK1 | CK1PPS | RC4 | RB7 |
ADC Conversion Trigger | ADACTPPS | RC2 | RC2 |
- Bidirectional pin. The corresponding output must select the same pin.