27.4.2 ADCON1

ADC Control Register 1
Name: ADCON1
Offset: 0x09E

Bit 76543210 
 FMCS[2:0]  PREF[1:0] 
Access R/WR/WR/WR/WR/WR/W 
Reset 000000 

Bit 7 – FM ADC Result Format/Alignment Selection

ValueDescription
1 Right-justified. The six Most Significant bits of ADRESH are zero-filled.
0 Left-justified. The six Least Significant bits of ADRESL are zero-filled.

Bits 6:4 – CS[2:0] ADC Conversion Clock Select

ValueDescription
111 ADCRC
110 FOSC/64
101 FOSC/16
100 FOSC/4
011 ADCRC
010 FOSC/32
001 FOSC/8
000 FOSC/2

Bits 1:0 – PREF[1:0] ADC Positive Voltage Reference Configuration

ValueDescription
11 VREF+ is connected to internal Fixed Voltage Reference (FVR)
10 VREF+ is connected to external VREF+ pin
01 Reserved
00 VREF+ is connected to VDD