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11.13.33 IPR6
Peripheral Interrupt
Priority Register 6| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| | U2EIP | U2IP | U2TXIP | U2RXIP | U1EIP | U1IP | U1TXIP | U1RXIP | |
| Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
| Reset | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | |
Bit 7 – U2EIP UART2 Framing Error
Interrupt Priority
| Value | Description |
|---|
| 1 |
High
Priority |
| 0 |
Low
Priority |
Bit 6 – U2IP UART2 Interrupt
Priority
| Value | Description |
|---|
| 1 |
High
Priority |
| 0 |
Low
Priority |
Bit 5 – U2TXIP UART2 Transmit
Interrupt Priority
| Value | Description |
|---|
| 1 |
High
Priority |
| 0 |
Low
Priority |
Bit 4 – U2RXIP UART 2 Receive
Interrupt Priority
| Value | Description |
|---|
| 1 |
High
Priority |
| 0 |
Low
Priority |
Bit 3 – U1EIP UART1 Framing Error Interrupt Priority
| Value | Description |
|---|
| 1 |
High Priority |
| 0 |
Low Priority |
Bit 2 – U1IP UART1 Interrupt Priority
| Value | Description |
|---|
| 1 |
High Priority |
| 0 |
Low Priority |
Bit 1 – U1TXIP UART1 Transmit Interrupt Priority
| Value | Description |
|---|
| 1 |
High Priority |
| 0 |
Low Priority |
Bit 0 – U1RXIP UART 1 Receive Interrupt Priority
| Value | Description |
|---|
| 1 |
High Priority |
| 0 |
Low Priority |
