43.3.3 Power-Down Current (I_PD)

Table 43-3.
Operating Conditions^(1,2,3): -40°C ≤ T_A ≤ +125°C HF oscillator @ 4 MHz; device in Sleep mode
Param. No.	Sym.	Device Characteristics	Min.	Typ.†	Max. +85°C	Max. +125°C	Units	Conditions
Param. No.	Sym.	Device Characteristics	Min.	Typ.†	Max. +85°C	Max. +125°C	Units	V_DD	Note
D200	I_PD	I_PD Base	—	0.12	2.0	9.7	μA	3.0V
D201	I_{PD_WDT}	Low-Frequency Internal Oscillator/WDT	—	0.5	3.0	9.8	μA	3.0V
D202*	I_{PD_SOSC}	Secondary Oscillator (S_OSC)	—	2.0	—	—	μA	3.0V	SOSCPWR = `0` (LP Mode)
D202A*	I_{PD_SOSC}	Secondary Oscillator (S_OSC)	—	5.8	—	—	μA	3.0V	SOSCPWR = `1` (HP Mode)
D203	I_{PD_LPBOR}	Low-Power Brown-out Reset (LPBOR)	—	0.25	2.8	9.8	μA	3.0V
D204	I_{PD_FVR_BUF1}	FVR Buffer 1 (ADC)	—	171	305	372	μA	3.0V
D204A	I_{PD_FVR_BUF2}	FVR Buffer 2 (DAC/CMP)	—	40	74	84	μA	3.0V
D205	I_{PD_BOR}	Brown-out Reset (BOR)	—	14.9	62	72	μA	3.0V
D207	I_{PD_ADCA}	ADC - Active⁽⁴⁾	—	175	360	420	μA	3.0V	ADC is converting
D208*	I_{PD_CMP}	Comparator	—	28	52	70	μA	3.0V	SP = `1` (LP Mode)
D208A*	I_{PD_CMP}	Comparator	—	77	102	120	μA	3.0V	SP = `0` (HP Mode)
† Data in “Typ.” column is at 3.0V, 25°C unless otherwise stated. * These parameters are characterized but not tested. Note: The peripheral current is the sum of the base I_DD and the additional current consumed when this peripheral is enabled. The peripheral ∆ current can be determined by subtracting the base I_DD or I_PD current from this limit. Max. values will be used when calculating total current consumption. The power-down current in Sleep mode does not depend on the oscillator type. Power-down current is measured with the part in Sleep mode with all I/O pins in High-Impedance state and tied to V_SS. All peripheral currents listed are on a per-peripheral basis if more than one instance of a peripheral is available. ADC clock source is ADCRC.

43.3.3 Power-Down Current (IPD)

43.3.3 Power-Down Current (I_PD)