43.3.4 I/O Ports

Table 43-4. 
Standard Operating Conditions (unless otherwise stated)
Param. No.Sym.Device CharacteristicsMin.Typ.†Max.UnitsConditions
Input Low-Voltage
VILI/O PORT:
D300
  • with TTL buffer
——0.8V4.5V ≤ VDD ≤ 5.5V
D301——0.15*VDDV1.8V ≤ VDD ≤ 4.5V
D302
  • with Schmitt Trigger buffer
——0.2*VDDV2.0V ≤ VDD ≤ 5.5V
D303
  • with I2C levels
——0.3*VDDV1.8V ≤ VDD ≤ 5.5V
D304
  • with SMBus 2.0
——0.8V2.7V ≤ VDD ≤ 5.5V
D305
  • with SMBus 3.0
——0.8V
D306MCLR——0.2*VDDV
High/Low-Voltage
VIHI/O PORT:
D320
  • with TTL buffer
2.0——V4.5V ≤ VDD ≤ 5.5V
D3210.25*VDD + 0.8——V1.8V ≤ VDD ≤ 4.5V
D322
  • with Schmitt Trigger buffer
0.8*VDD——V2.0V ≤ VDD ≤ 5.5V
D323
  • with I2C levels
0.7*VDD——V
D324
  • with SMBus 2.0
2.1——V2.7V ≤ VDD ≤ 5.5V
D325
  • with SMBus 3.0
1.35——V

0°C ≤ TA ≤ 125°C

For VDD ≥ 3.6V; VDDAR = 1

For VDD < 3.6V; VDDAR = 0

D325A1.45——V

TA < 0°C

For VDD ≥ 3.6V; VDDAR = 1

For VDD < 3.6V; VDDAR = 0

D326MCLR0.7 VDD——V
Input Leakage Current(1)
D340IILI/O PORTS—±5±125nAVSS ≤ VPIN ≤ VDD,

Pin at high-impedance, 85°C

D341—±5±1000nAVSS ≤ VPIN ≤ VDD,

Pin at high-impedance, 125°C

D342MCLR(2)—±50±200nAVSS ≤ VPIN ≤ VDD,

Pin at high-impedance, 85°C

Weak Pull-up Current
D350IPUR30100200μAVDD = 3.0V,

VPIN = VSS

Output Low-Voltage
D360VOLI/O PORTS——0.6VIOL = 10.0 mA,

VDD = 3.0V

Output High-Voltage
D370VOHI/O PORTSVDD - 0.7——VIOH = 6.0 mA,

VDD = 3.0V

Load Capacitance
D380*CIO—550pF
Input Capacitance
D390*CIAll I/O Pins—5—pF

† Data in “Typ.” column is at 3.0V, 25°C unless otherwise stated.

* These parameters are characterized but not tested.

Note:
  1. Negative current is defined as current sourced by the pin.
  2. The leakage current on the MCLR pin is strongly dependent on the applied voltage level. The specified levels represent normal operating conditions. Higher leakage current may be measured at different input voltages.