13.5.8.1 Cache Invalidate by Line Operation

When an invalidate by line command is issued, the CMCC resets the valid bit information of the decoded cache line. As the line is no longer valid, the replacement counter points to that line.

1. Disable the cache controller by writing a zero to the Cache Controller Enable bit in the Cache Control register (CTRL.CEN).
2. Check SR.CSTS to verify that the CMCC is successfully disabled.
3. Perform an invalidate by line by writing the INDEX and WAY bit fields in the Cache Maintenance 1 register (MAINT1.INDEX, MAINT1.WAY).
4. Enable the CMCC by writing a '1' to CTRL.CEN.