43.6.2.1 Enabling, Disabling, and Resetting

The ADC is enabled by setting CTRLA.ENABLE = 1. Setting this bit to zero disables the ADC. The ADC can be reset by setting CTRLA.SWRST = 1 to initiate a software reset. (The ADC module is reset when the SYNCYBUSY.SWRST bit goes low.)

Note: The bit DBGCTRL.DBGRUN is unchanged by a software reset.

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