2.13.1 SCL/SDA Transition Time

SCL/SDA minimum transition time is not met in Fast-mode plus (1 MHz).

Work Around:

  • If desired, external series resistors can slow the fall transition.
  • Recommend REXT*CLOAD>13 ns. REXT must not exceed 1 Kohms.
Product/InterfaceVoltage RangeIOLmin
I2C2.97<VDDIO<3.6316.3 mA
1.9<VDDIO<2.979.3 mA

Affected Silicon Revisions

PIC32CX1012BZ25048/WBZ451/WBZ451H/WBZ451PE-E
A0A2
XX
PIC32CX1012BZ24032/WBZ450
A2
X