2.17.1 ERRADDR Register may Read as ‘0’ when PB-Bridge-B (PB2_CLK) is Not Equal to System Clock (SYS_CLK)
If PB2_CLK is not equal to System Clock (sys_clk), ERRADDR register read will not return the
failing address (caused by Single Bit Error/Dual Bit Error); instead it may return
‘0’.
Work Around:
When using RAM ECC in the application, configure PB2_CLK to be equal to SYS_CLK without any divisions.
Affected Silicon Revisions
PIC32CX1012BZ25048/WBZ451/WBZ451H/WBZ451PE-E| A0 | A2 | |||||
|---|---|---|---|---|---|---|
| X | X |
| A2 | |||||
|---|---|---|---|---|---|
| X |
