AT24CM02

2 Pin Descriptions

The descriptions of the pins are listed in Table 2-1.

Table 2-1. Pin Function Table
Name	8‑Lead SOIC	8‑Ball WLCSP	Function
NC	1	A3	No Connect
NC	2	B4	No Connect
A2⁽¹⁾	3	C4	Device Address Input
GND	4	D3	Ground
SDA	5	D2	Serial Data
SCL	6	C1	Serial Clock
WP⁽¹⁾	7	B2	Write-Protect
V_CC	8	A2	Device Power Supply

Note:

If the A2 or WP pins are not driven, they are internally pulled down to GND. In order to operate in a wide variety of application environments, the pull-down mechanism is intentionally designed to be somewhat strong. Once these pins are biased above the CMOS input buffer’s trip point (~0.5 x V_CC), the pull‑down mechanism disengages. Microchip recommends connecting these pins to a known state whenever possible.

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