9.4 NVM User Row Mapping
The first two 32-bit words of the NVM User Row contain calibration data that are automatically read at device power-on.
The NVM User Row can be read at address 0x804000.
To write the NVM User Row, refer to NVMCTRL – Non-Volatile Memory Controller.
When writing to the user row, the values do not get loaded by other modules on the device until a device Reset occurs.
Bit Position | Name | Usage |
---|---|---|
2:0 | BOOTPROT | Used to select
one of eight different bootloader sizes. Refer to the “NVMCTRL –
Non-Volatile Memory Controller”. Default value = 0x7 except for WLCSP45
that has default value = 0x3. Note: WLCSP27 devices boot ROM is
not protected as the bootloader is self-upgradable through the
I2C interface. . |
3(1) | Reserved | Do not modify the value of a reserved bit. Reading a reserved bit has no significance to the user application. |
6:4 | EEPROM | Used to select one of eight different EEPROM Emulation sizes. Refer to NVMCTRL – Non-Volatile Memory Controller. Default value = 7. |
7(1) | Reserved | Do not modify the value of a reserved bit. Reading a reserved bit has no significance to the user application. |
13:8 | BOD33 Level | BOD33 Threshold Level at power on. Refer to SYSCTRL BOD33 register. Default value = 7 on all package grades except Extended Temperature with compliance to AEC-Q100 which has Default value = 34. |
14 | BOD33 Enable | BOD33 Enable at power on . Refer to SYSCTRL BOD33 register. Default value = 1. |
16:15 | BOD33 Action | BOD33 Action at power on. Refer to SYSCTRL BOD33 register. Default value = 1. |
24:17(1) | Reserved | Do not modify the value of a reserved bit. Reading a reserved bit has no significance to the user application. |
25 | WDT Enable | WDT Enable at power on. Refer to WDT CTRL register. Default value = 0. |
26 | WDT Always-On | WDT Always-On at power on. Refer to WDT CTRL register. Default value = 0. |
30:27 | WDT Period | WDT Period at power on. Refer to WDT CONFIG register. Default value = 0x0B. |
34:31 | WDT Window | WDT Window mode time-out at power on. Refer to WDT CONFIG register. Default value = 0x0B. |
38:35 | WDT EWOFFSET | WDT Early Warning Interrupt Time Offset at power on. Refer to WDT EWCTRL register. Default value = 0xB. |
39 | WDT WEN | WDT Timer Window Mode Enable at power on. Refer to WDT CTRL register. Default value = 0. |
40 | BOD33 Hysteresis | BOD33 Hysteresis configuration at power on. Refer to SYSCTRL BOD33 register. Default value = 1. |
47:41 | Reserved | Do not modify the value of a reserved bit. Reading a reserved bit has no significance to the user application. |
63:48 | LOCK | NVM Region Lock Bits. Refer to NVMCTRL – Non-Volatile Memory Controller. Default value = 0xFFFF. |
Note:
- It is required to preserve the value of a reserved bit while modifying the NVM User Row bits.