32.14.3 SERCOM in I²C Mode Timing

The following table describes the requirements for devices connected to the I²C Interface Bus. Timing symbols refer to the figure below.

Figure 32-16. I²C Interface Bus Timing

Table 32-51. I²C Interface Timing⁽¹⁾
Symbol	Parameter	Conditions	Min.	Typ.	Max.	Units
t_R	Rise time for both SDA and SCL⁽³⁾		-	-	300	ns
t_OF	Output fall time from V_IHmin to V_ILmax⁽³⁾	10pF < C_b⁽²⁾ < 400pF	7.0	10.0	50.0
t_HD;STA	Hold time (repeated) START condition	f_SCL> 100kHz, Host	t_LOW-9	-	-
t_LOW	Low period of SCL Clock	f_SCL> 100kHz	113	-	-
t_BUF	Bus free time between a STOP and a START condition	f_SCL> 100kHz	t_LOW	-	-
t_SU;STA	Setup time for a repeated START condition	f_SCL> 100kHz, Host	t_LOW+7	-	-
t_HD;DAT	Data hold time	f_SCL> 100kHz, Host	9	-	12
t_SU;DAT	Data setup time	f_SCL> 100kHz, Host	104	-	-
t_SU;STO	Setup time for STOP condition	f_SCL> 100kHz, Host	t_LOW+9	-	-
t_SU;DAT;rx	Data setup time (receive mode)	f_SCL> 100kHz, Client	51	-	56
t_HD;DAT;tx	Data hold time (send mode)	f_SCL> 100kHz, Client	71	90	138

Note:

These values are based on simulation. These values are not covered by test limits in production.
Cb = Capacitive load on each bus line. Otherwise noted, value of C_b set to 20pF.
These values are based on characterization. These values are not covered by test limits in production.

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