5.7.4 Cyclic Redundancy Check (CRC)
AVR and PIC32CM MCUs provide hardware support for Cyclic Redundancy Check (CRC) to ensure data and code integrity, which is crucial for safety and reliability in embedded systems. Both MCUs can perform CRC checks over memory regions (such as Flash or SRAM), support standard CRC polynomials, and can trigger system responses (such as interrupts or resets) if a CRC mismatch is detected. These features help prevent the execution of corrupted code and enable robust error detection in data transfers or memory checks. Table 5-30 shows a comparison of features between AVR and PIC32CM.
| Feature/Aspect | AVR® CRC (CRCSCAN) | PIC32CM CRC (DSU, DMAC) |
|---|---|---|
| Integration | Stand-alone CRCSCAN peripheral | Integrated into Device Service Unit (DSU) and Direct Memory Access Controller (DMAC) |
| User Configuration | Selectable region and polynomial | Selectable region and polynomial (DMAC) |
| Supported Polynomials |
CRC-16-CCITT CRC-32 (IEEE® 802.3) |
DSU: CRC-32 DMAC: CRC-16-CCITT & CRC-32 |
| Memory Regions | Flash (entire, boot, or application section) | Any memory accessible via bus matrix (Flash, SRAM) |
| Trigger/Control | Can run at reset, initialize, or by software | Command issued via DSU or DMAC |
| Status/Result | Supported | Supported |
| Interrupts | NMI on CRC failure | No direct NMI, but can trigger interrupts/events |
| DMA Integration | N/A | DMAC can perform CRC on transferred data |
| Software Fallback | Supported | Supported |