5.6.1 Universal Synchronous and Asynchronous Serial Receiver and Transmitter (USART)
AVR and PIC32CM MCUs provide highly flexible and robust USART peripherals. Both USART variants support buffered communication, interrupt-driven operation, and operation in low-power modes, making them suitable for a variety of embedded communication needs. Table 5-21 shows a comparison of features between AVR and PIC32CM.
| Feature | AVR® USART | PIC32CM USART (SERCOM) |
|---|---|---|
| Integration | Stand-alone USART peripheral | Mode in SERCOM (Serial Communications) peripheral |
| Operation Modes |
Full-duplex Half-duplex synchronous/asynchronous |
Full-duplex Half-duplex Synchronous/asynchronous |
| Protocol/ Standard Support |
IrDA® LIN client SPI host RS-485 |
Varies per device family: IrDA® LIN host/client ISO 7816 (smart card) RS-485 |
| Buffer/FIFO | Two-level transmit/receive buffer | 16-byte transmit/receive FIFO |
| Baud Rate Generation | Fractional, from any peripheral clock | Baud rate generator, internal/external clock |
| Data Bits | 5, 6, 7, 8, 9 | 5, 6, 7, 8, 9 |
| Stop Bits | One or two | One or two |
| Parity | Odd, even, none | Odd, even, none |
| Data Order | N/A | LSb or MSb first selectable |
| Flow Control | N/A | Request-to-Send (RTS) and Clear-to-Send (CTS) hardware flow control |
| DMA Support | N/A | Supported |
| Error Detection |
Parity Buffer overflow Frame error Noise filtering |
Parity Buffer overflow Frame error Noise filtering Collision detection |
| Sleep Mode Operation | Supported | Supported |
| Interrupts | Separate for TX complete, TX data empty, RX complete | Multiple, including FIFO events |
| Pin Mapping | Fixed | Flexible |
