4.1 AVR®

The AVR MCU core features a Harvard architecture with separate instruction and data buses, maximizing performance through simultaneous access to program and data memory. It includes a rich set of 32 general-purpose working registers directly connected to the Arithmetic Logic Unit (ALU), enabling single-cycle instruction execution for most operations. Its architecture enables high-performance and low-power consumption, making AVR MCUs popular in embedded systems and consumer electronics.