26.3.2.2.1 Clock Generation

The TWI supports several transmission modes with different frequency limitations:

Standard mode (Sm) up to 100 kHz
Fast mode (Fm) up to 400 kHz
Fast mode Plus (Fm+) up to 1 MHz

Write the Host Baud Rate (TWIn.MBAUD) register to a value that will result in a TWI bus clock frequency equal to, or less than, those frequency limits, depending on the transmission mode.

The low (t_LOW) and high (t_HIGH) times are determined by the Host Baud Rate (TWIn.MBAUD) register, while the rise (t_R) and fall (t_OF) times are determined by the bus topology.

t_LOW is the low period of SCL clock
t_HIGH is the high period of SCL clock
t_R is determined by the bus impedance; for internal pull-ups. Refer to the Electrical Characteristics section for details.
t_OF is the output fall time and is determined by the open-drain current limit and bus impedance. Refer to the Electrical Characteristics section for details.

Properties of the SCL Clock

The SCL frequency is given by:

Equation 26-1. SCL Frequency

f_{SCL} = \frac{1}{t_{LOW} + t_{HIGH} + t_{OF} + t_{R}} [Hz]

$f_{SCL} = \frac{1}{t_{LOW} + t_{HIGH} + t_{OF} + t_{R}} [Hz]$

The SCL clock is designed to have a 50/50 duty cycle, where the low period of the duty cycle comprises of t_OF and t_LOW. t_HIGH will not start until a high state of SCL has been detected. The BAUD bit field in the TWIn.MBAUD register and the SCL frequency are related by the following formula:

Equation 26-2. SCL Frequency

f_{S C L} = \frac{f_{C L K_P E R}}{10 + 2 \times B A U D + f_{C L K_P E R} \times t_{R}}

$f_{S C L} = \frac{f_{C L K_P E R}}{10 + 2 \times B A U D + f_{C L K_P E R} \times t_{R}}$

Figure 3 can be transformed to express BAUD:

Equation 26-3. BAUD

B A U D = \frac{f_{C L K_P E R}}{2 \times f_{S C L}} - (5 + \frac{f_{C L K_P E R} \times t_{R}}{2})

$B A U D = \frac{f_{C L K_P E R}}{2 \times f_{S C L}} - (5 + \frac{f_{C L K_P E R} \times t_{R}}{2})$

Calculation of the BAUD Value

To ensure operation within the specifications of the desired speed mode (Sm, Fm, Fm+), follow these steps:

Calculate a value for the BAUD bit field using Figure 4.
Calculate t_LOW using the BAUD value from step 1:
Equation 26-4. t_LOW

$t_{L O W} = \frac{B A U D + 5}{f_{C L K_P E R}} - t_{O F}$ $t_{L O W} = \frac{B A U D + 5}{f_{C L K_P E R}} - t_{O F}$
Check if t_LOW from Figure 5 is above the specified minimum of the desired mode (t_{LOW_Sm} = 4700 ns, t_{LOW_Fm} = 1300 ns, t_{LOW_Fm+} = 500 ns).
- If the calculated t_LOW is above the limit, use the BAUD value from Figure 4
- If the limit is not met, calculate a new BAUD value using Figure 6 below, where t_{LOW_mode} is either t_{LOW_Sm}, t_{LOW_Fm}, or t_{LOW_Fm+} from the mode specifications:
  Equation 26-5. BAUD
  
  $B A U D = f_{C L K_P E R} \times (t_{L O W_m o d e} + t_{O F}) - 5$ $B A U D = f_{C L K_P E R} \times (t_{L O W_m o d e} + t_{O F}) - 5$

ATtiny424/426/427 ATtiny824/826/827

26.3.2.2.1 Clock Generation

Properties of the SCL Clock

Calculation of the BAUD Value