1 Overview

The ATA5352 includes a fully-digital transmitter that provides maximum flexibility in the UWB pulse generation. The transmitter can accurately generate pulse durations ranging from 1-10 ns, with controlled envelope shape and a carrier frequency from around 6.2-8.3 GHz. Transmitter output power can be fine-tuned to ensure that all applications meet ETSI and FCC regulations.

The following figure illustrates the ATA5352 block diagram.

The ATA5352 receiver is characterized by a high-gain and low-power wideband analog radio frequency front-end and a high-speed and low-power digital base band processor.

The receive path consists of a frequency-down conversion circuit comprising Low-Noise Amplifiers (LNA) and mixers, a digitally-controlled Variable Gain Amplifier (VGA) with a digital Automatic Gain Control (AGC), an Analog-to-Digital (ADC) conversion and a digital baseband signal processing unit for the highly stable sub-nanosecond Time of Arrival (ToA) estimation.

The system includes a proven custom Media Access Control (MAC) layer for secure distance bounding and data communication for proximity-based access control.

The secure distance-bounding layer design helps to counter both application and physical-layer distance modification attacks. It can operate with any microcontroller that can provide cryptographically secure random number generation and authentication routine.

The ATA5352 supports three different operating modes:

Verifier/Prover (VR/PR) – For distance-bounding and localization applications, the device is switched into autonomous operating modes, handling receive and transmit operation during the measurement period. The device can operate as a verifier by transmitting and receiving the measurement pulses as well as challenge and response data. On the other side, the device can operate as a prover to receive and re-transmit the measurement pulses creating the response data.
Receive/Transmit (RX/TX) – For data communication, the device supports Transmit and Receive modes to establish a bidirectional communication between the ATA5352 devices.

Time Difference of Arrival (TDoA) – The TDoA operation uses the RX and TX data communication with timestamp capturing, a specialized header and footer section in payload format. The timestamp capturing occurs at different positions while transmitting or receiving a TDoA data telegram. The TDoA implementation supports wired and wireless synchronization, and scheduled data telegram transmission. Measure the time difference between a transmitter (Tag) and several receivers (Anchors).

Table 1-1. ATA5352 Operating Modes
Mode	Description
Power-Down	The ATA5352 is in power-down mode when no power source is applied.
OFF	The device is in OFF mode when VDD_IO is applied, but VDD_CORE is connected to GND.
IDLE	The device is powered, but still in Reset state.
READY	The device is powered, the Reset is released and the SPI is ready to accept commands.
Receive RX/RXo	Receiving mode for data communication and optional TDoA mode.
Transmit TX/TXo	Transmitting mode for data communication and optional TDoA mode.
Verifier VR/VRo/VRs/VRso	The ATA5352 is in distance-bounding mode as a verifier. In this mode, the ATA5352 sends distance-bounding challenges and receives the distance-bounding responses.
Prover PR/PRo/PRs/PRso	The ATA5352 is in distance-bounding mode as a prover. In this mode, the ATA5352 receives incoming distance-bounding challenges, processes these challenges and sends back the distance-bounding responses.

Note: For more details about modes, packets, features and device overview, refer to the ATA5352 Impulse-Radio Ultra-Wideband (IR-UWB) Transceiver Data Sheet (DS70005451) and ATA5352 Impulse-Radio Ultra-Wideband (IR-UWB) Transceiver User’s Guide (DS50003111)