2.2.1 Gain Control of the Crystal Oscillator
The crystal oscillator (0.4 → 16 MHz) doesn’t latch its gain control
(CKSEL/CSEL[2..0] bits):
- The ‘recover system clock source’ command doesn’t return CSEL[2..0] bits.
- The gain control can be modified on the fly if CLKSELR changes.
Work Around
- No work around.
- As soon as possible, after any CLKSELR modification, re-write the appropriate crystal oscillator setting (CSEL[3]=1 and CSEL[2..0] / CSUT[1..0] bits) in CLKSELR.
Code example:
; Select crystal oscillator (16MHz crystal, fast rising power)
ldi temp1,((0x0F<<CSEL0)|(0x02<<CSUT0))
sts CLKSELR, temp1
; Enable clock source (crystal oscillator)
ldi temp2,(1<<CLKCCE)
ldi temp3,(0x02<<CLKC0) ; CSEL = "0010"
sts CLKCSR,temp2 ; Enable CLKCSR register access
sts CLKCSR,temp3 ; Enable crystal oscillator clock
; Clock source switch
ldi temp3,(0x04<<CLKC0) ; CSEL = "0100"
sts CLKCSR,temp2 ; Enable CLKCSR register access
sts CLKCSR,temp3 ; Clock source switch
; Select watchdog clock (128KHz, fast rising power)
ldi temp3,((0x03<<CSEL0)|(0x02<<CSUT0))
sts CLKSELR, temp3 ; (*)
; (*) !!! Loose gain control of crystal oscillator !!!
; ==> WORKAROUND ...
sts CLKSELR, temp1
; ...
Affected Silicon Revisions
| Rev. A | Rev. B | Rev. C |
| X | X | X |