5.3.3.1 Reset and Discovery Response Timing

Table 5-4. Reset and Discovery Response TimingUnless otherwise indicated, these values are applicable over the specified operating range from T_A = -40℃ to +105℃, V_CC = +1.65V to +5.5V, CL = 100 pF.
Parameter and Condition⁽¹⁾		Sym.	Min.	Max.	Units
Reset Low Time, Device in Inactive State⁽⁴⁾		t_RESET	96	—	µs
Discharge Low Time, Device in Active Write Cycle (t_WR)^{(4, 7)}		t_DSCHG	150	—	µs
Reset Recovery Time^{(4, 6)}	Clock Divider = 1x	t_RRT	1000	—	µs
	Clock Divider = 2x		1200	—	µs
	Clock Divider = 4x		1800	—	µs
Discovery Response Request⁽⁴⁾		t_DRR	1	2 – t_PUP⁽²⁾	µs
Discovery Response Acknowledge Time⁽⁵⁾		t_DACK	2	6⁽³⁾	µs
Host Strobe Discovery Response Time⁽⁴⁾		t_MSDR	t_RD + t_PUP⁽²⁾	2	µs
SI/O High Time for Start/Stop Condition⁽⁴⁾		t_HTSS	150	—	µs

Note:

AC measurement conditions for the table above:
- All parameters are production tested unless otherwise noted.
- Loading capacitance on SI/O: 100 pF
- V_PUP: Applied at minimum and maximum V_CC
- In Parasitic Power mode, V_PUP minimum restricted to 2.4V
t_PUP is the time required to be pulled up from V_IL to V_IH when the SI/O line is released. This value is application-specific and is a function of the loading capacitance on the SI/O line as well as the R_PUP chosen.
Microchip’s AT21CS11 supports a maximum of 24 µs and a minimum of 8 µs.
The host system must ensure the parameter timing values are met.
The SHA104-TFLXAUTH ensures by design this timing parameter is met.
Parameter is ensured through characterization but is not production tested.
This parameter is only relevant when operating in parasitic power mode.