5.2.5 5-byte Config Bits Registers

This file contains the API prototype for the Configuration Bits driver.

//CONFIG1
#pragma config FEXTOSC = ECH    // External Oscillator Selection bits->EC (external clock) above 16 MHz
#pragma config RSTOSC = EXTOSC    // Reset Oscillator Selection bits->EXTOSC operating per FEXTOSC bits
#pragma config CLKOUTEN = OFF    // Clock Out Enable bit->CLKOUT function is disabled; i/o or oscillator function on OSC2
#pragma config VDDAR = HI    // VDD Range Analog Calibration Selection bit->Internal analog systems are calibrated for operation between VDD = 2.3 - 5.5V

//CONFIG2
#pragma config MCLRE = EXTMCLR    // Master Clear Enable bit->If LVP = 0, MCLR pin is MCLR; If LVP = 1, RA3 pin function is MCLR
#pragma config PWRTS = PWRT_OFF    // Power-up Timer Selection bits->PWRT is disabled
#pragma config WDTE = OFF    // WDT Operating Mode bits->WDT disabled; SEN is ignored
#pragma config BOREN = ON    // Brown-out Reset Enable bits->Brown-out Reset enabled, SBOREN bit is ignored
#pragma config DACAUTOEN = OFF    // DAC Buffer Automatic Range Select Enable bit->DAC Buffer reference range is determined by the REFRNG bit
#pragma config BORV = LO    // Brown-out Reset Voltage Selection bit->Brown-out Reset Voltage (VBOR) set to 1.9V
#pragma config ZCD = OFF    // ZCD Disable bit->ZCD module is disabled; ZCD can be enabled by setting the ZCDSEN bit of ZCDCON
#pragma config PPS1WAY = ON    // PPSLOCKED One-Way Set Enable bit->The PPSLOCKED bit can be cleared and set only once after an unlocking sequence is executed; once PPSLOCKED is set, all future changes to PPS registers are prevented
#pragma config STVREN = ON    // Stack Overflow/Underflow Reset Enable bit->Stack Overflow or Underflow will cause a reset

//CONFIG4
#pragma config BBSIZE = BB512    // Boot Block Size Selection bits->512 words boot block size
#pragma config BBEN = OFF    // Boot Block Enable bit->Boot Block disabled
#pragma config SAFEN = OFF    // Storage Area Flash (SAF) Enable bit->SAF disabled
#pragma config WRTAPP = OFF    // Application Block Write Protection bit->Application Block is NOT write protected
#pragma config WRTB = OFF    // Boot Block Write Protection bit->Boot Block is NOT write protected
#pragma config WRTC = OFF    // Configuration Register Write Protection bit->Configuration Register is NOT write protected
#pragma config WRTD = OFF    // Data EEPROM Write Protection bit->Data EEPROM is NOT write-protected
#pragma config WRTSAF = OFF    // Storage Area Flash (SAF) Write Protection bit->SAF is NOT write protected
#pragma config LVP = ON    // Low Voltage Programming Enable bit->Low Voltage programming enabled. MCLR/Vpp pin function is MCLR. MCLRE Configuration bit is ignored

//CONFIG5
#pragma config CP = OFF    // Program Flash Memory Code Protection bit->Program Flash Memory code protection is disabled
#pragma config CPD = OFF    // Data EEPROM Code Protection bit->EEPROM code protection is disabled

This file contains the API prototype for the System Driver.

This file contains the API Implementation for the Device Configuration Bits driver.

CONFIGURATION BITS Generated Driver Source File

CONFIGURATION BITS Generated Driver Header File

• void SYSTEM_Initialize (void)

  Initializes the system module. This is called only once before calling other APIs.

This file contains the API implementation for the System Driver.

System Driver Source File

• void SYSTEM_Initialize (void)

  Initializes the system module. This is called only once before calling other APIs.

System Driver Header File