6 On-Board Nano Debugger
This section describes the features and interfaces of the on-board debugger for programming and debugging.
6.1 Overview
- Debugger: Enables programming and debugging of the target device.
- Virtual serial port (CDC): Provides access to the target device’s UART interface.
- Data Gateway Interface (DGI): Microchip’s proprietary interface for streaming data to the host computer.
- Mass storage device: Supports drag-and-drop programming of the target device, provides kit information files and supports utility commands.
6.2 Power and Status LED
The on-board debugger controls a Power and Status LED (marked PS) on the AVR32LA32 Curiosity Nano board. The table below shows how the different operation modes control the LED.
| Operation Mode | Power and Status LED |
|---|---|
| Boot Loader mode | The LED blinks slowly during power-up |
| Power-up | The LED is ON |
| Normal operation | The LED is ON |
| Programming | Activity indicator: The LED blinks slowly during programming or debugging |
| Drag-and-drop programming |
|
| Fault | The LED blinks rapidly if a power fault is detected |
| Off | When the on-board debugger is powered down, the LED is OFF |
6.3 Connections
The table below lists the connections between the target device and the debugger. When the debugger is inactive, these connections are set to high-impedance (tri-state) mode. This allows users to use these pins for any function without interference from the debugger. The debugger lines include series resistors to prevent short-circuits and potential damage to the target I/O pins when both the debugger and target attempt to drive a pin simultaneously.
| Debugger Pin | AVR32LA32 Pin | Description | |
|---|---|---|---|
| CDC TX | PC2 | USART0 RX | USB CDC TX line |
| CDC RX | PC1 | USART0 TX | USB CDC RX line |
| DBG0 | PF7 | UPDI | Debug data line |
| DBG1 | PF5 | LED0/GPIO1 | Debug GPIO1/LED0 |
| DBG2 | PC0 | SW0/GPIO0 | Debug GPIO0/SW0 |
| DBG3 | PF6 | RESET | Reset line |
| VOFF | — | Pull VOFF low to disable the on-board regulator and allow external power on VTG; VOFF is monitored by the debugger | |
| ID | — | Identification of supported base boards and extensions at power-up | |
6.4 Disconnecting the On-Board Debugger
- Evaluating the target device’s power consumption in isolation removes the on-board debugger's influence on current measurements
- Using the target device with an external programmer/debugger
- Using the on-board debugger as a standalone programmer/debugger for other devices
- Debugger Pins (J101, J102, J103, J104, J105, J106)
- Power
6.5 Connecting External Debuggers
Although the board includes an on-board debugger, external debuggers can also be connected directly to the target device for programming and debugging. When the on-board debugger is not actively in use, it keeps all pins connected to the board edge and the target device in a tri-state condition. This ensures that the on-board debugger does not interfere with any external debug tools.
