3.2 RTG4 SSO Guidelines

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The use of virtual ground pins is not needed for RTG4™. This is due to flip-chip design, improved package characteristics, and on-package decoupling.

The number of SSOs mentioned in the RT4G150 device SSO guideline tables is per bank.

The following table lists the MSIO SSO guidelines and standards when SSO load for MSIO is 500Ω, in parallel with 50 pF load, at a pulse width of 1 ns for RT4G150-LG1657-PROTO and Production devices.

Table 3-14. MSIO SSO Guidelines at 1 ns Pulse Width for RT4G150-LG1657-PROTO and Production Devices
I/O Standards	Drive Strength (mA)	SSOs Causing GND Bounce	SSOs Causing VDDI Bounce
LVTTL	16	76	76
	12	76	76
	8	76	76
	4	76	76
	2	76	76
LVCMOS25	14	76	76
	12	76	76
	8	76	76
	6	76	76
	4	76	76
	2	76	76
LVCMOS18	12	76	76
	8	76	76
	6	76	76
	4	76	76
	2	76	76
LVCMOS15	8	76	76
	6	76	76
	4	76	76
	2	76	76
LVCMOS12	4	76	76
LVCMOS12	2	76	76

The following table lists the MSIO SSO guidelines and standards when SSO load for MSIO is 500Ω, in parallel with 50 pF load, at a pulse width of 0 ns for RT4G150-LG1657-PROTO and Production devices.

Table 3-15. MSIO SSO Guidelines at 0 ns Pulse Width for RT4G150-LG1657-PROTO and Production Devices
I/O Standards	Drive Strength (mA)	SSOs Causing GND Bounce	SSOs Causing VDDI Bounce
LVTTL	16	76	76
	12	76	76
	8	76	76
	4	76	76
	2	76	76
LVCMOS25	14	76	76
	12	76	76
	8	76	76
	6	76	76
	4	76	76
	2	76	76
LVCMOS18	12	76	76
	8	76	76
	6	76	76
	4	76	76
	2	76	76
LVCMOS15	8	76	76
	6	76	76
	4	76	76
	2	76	76
LVCMOS12	4	76	76
LVCMOS12	2	76	76

The following table lists the MSIOD SSO guidelines and standards when SSO load for MSIOD is 500Ω, in parallel with 50 pF load, at a pulse width of 1 ns for RT4G150-LG1657-PROTO and Production devices.

Table 3-16. MSIOD SSO Guidelines at 1 ns Pulse Width for RT4G150-LG1657-PROTO and Production Devices
I/O Standards	Drive Strength (mA)	SSOs Causing GND Bounce	SSOs Causing VDDI Bounce
LVCMOS25	10	76	76
	8	76	76
	6	76	76
	4	76	76
	2	76	76
LVCMOS18	8	76	76
	6	76	76
	4	76	76
	2	76	76
LVCMOS15	6	76	76
	4	76	76
	2	76	76
LVCMOS12	4	76	76
LVCMOS12	2	76	76

The following table lists the MSIOD SSO guidelines and standards when SSO load for MSIOD is 500Ω, in parallel with 50 pF load, at 0 ns pulse width for RT4G150-LG1657-PROTO and Production devices.

Table 3-17. MSIOD SSO Guidelines at 0 ns Pulse Width for RT4G150-LG1657-PROTO and Production Devices
I/O Standards	Drive Strength (mA)	SSOs Causing GND Bounce	SSOs Causing VDDI Bounce
LVCMOS25	10	76	76
	8	76	76
	6	76	76
	4	76	76
	2	76	76
LVCMOS18	8	76	76
	6	76	76
	4	76	76
	2	76	76
LVCMOS15	6	76	76
	4	76	76
	2	76	76
LVCMOS12	4	76	76
LVCMOS12	2	76	76

The following table lists the DDRIO SSO guidelines and standards when trace load for DDRIO is 17 pF, at a pulse width of 1 ns for RT4G150-LG1657-PROTO and Production devices.

Table 3-18. DDRIO SSO Guidelines at 1 ns Pulse Width for RT4G150-LG1657-PROTO and Production Devices
I/O Standards	Drive Strength (mA)	SSOs Causing GND Bounce	SSOs Causing VDDI Bounce
LVCMOS25	16	16	76
	12	76	76
	8	76	76
	6	76	76
	4	76	76
	2	76	76
LVCMOS18	16	76	76
	12	76	76
	10	76	76
	8	76	76
	6	76	76
	4	76	76
	2	76	76
LVCMOS15	12	76	76
	10	76	76
	8	76	76
	6	76	76
	4	76	76
	2	76	76
LVCMOS12	8	76	76
	4	76	76
	2	76	76

The following table lists the DDRIO SSO guidelines and standards when trace load for DDRIO is 17 pF, at a pulse width of 0 ns for RT4G150-LG1657-PROTO and Production devices.

Table 3-19. DDRIO SSO Guidelines at 0 ns Pulse Width for RT4G150-LG1657-PROTO and Production Devices
I/O Standards	Drive Strength (mA)	SSOs Causing GND Bounce	SSOs Causing VDDI Bounce
LVCMOS25	16	6	56
	12	14	76
	8	24	76
	6	34	76
	4	76	76
	2	76	76
LVCMOS18	16	16	76
	12	24	76
	10	76	76
	8	76	76
	6	76	76
	4	76	76
	2	76	76
LVCMOS15	12	22	76
	10	76	76
	8	76	76
	6	76	76
	4	76	76
	2	76	76
LVCMOS12	6	76	76
	4	76	76
	2	76	76

The following table lists the pushout delays for MSIO, MSIOD, when SSO load is 500Ω, in parallel with 50 pF load and for DDRIO, when trace load is 17 pF, in RT4G150-LG1657-PROTO and Production devices.

Table 3-20. Pushout Delays in RT4G150-LG1657-PROTO and Production Devices¹
I/O Standards	MSIO		MSIOD		DDRIO
I/O Standards	I/O Drive Strength (mA)	Maximum Push Out Delay Measured (ns)	I/O Drive Strength (mA)	Maximum Push Out Delay Measured (ns)	I/O Drive Strength (mA)	Maximum Push Out Delay Measured (ns)
LVTTL	16	0.101	—	—	—	—
LVTTL	4	0.121	—	—	—	—
LVCMOS25	16	0.146	10	0.128	16	0.152
LVCMOS25	—	—	4	0.153	—	—
LVCMOS18	12	0.189	8	0.141	16	0.158
LVCMOS18	—	—	2	0.164	—	—
LVCMOS15	8	0.226	6	0.148	12	0.153
LVCMOS15	—	—	2	0.155	—	—
LVCMOS12	4	0.276	4	0.185	6	0.169

Note:

MSIO, MSIOD, and DDRIO do not support the same drive strength combinations. Hence, the unsupported drive strengths and their corresponding cells are marked empty with em dash.

The following table lists the MSIO SSO guidelines and standards when SSO load for MSIO is 499Ω in parallel with 50 pF load, at a pulse width of 0 ns for RT4G150-CQ352 production devices.

Table 3-21. MSIO SSO Guidelines at 0 nS Pulse Width for RT4G150-CQ352 Devices
I/O Standards	Drive Strength (mA)	SSOs Causing GND Bounce	SSOs Causing VDDI Bounce
LVCMOS33/LVTTL	16	10	28
	12	12	34
	8	22	54
	4	54	58
	2	58	58
LVCMOS25	14	20	26
	12	22	30
	8	26	36
	6	34	54
	4	54	58
	2	58	58
LVCMOS18	12	54	46
	10	54	54
	8	58	58
	6	58	58
	4	58	58
	2	58	58
LVCMOS15	8	58	58
	6	58	58
	4	58	58
	2	58	58
LVCMOS12	4	58	58
LVCMOS12	2	58	58

The following table lists the MSIO SSO guidelines and standards when SSO load for MSIO is 499Ω in parallel with 50 pF load, at a pulse width of 1 ns for RT4G150-CQ352 production devices.

Table 3-22. MSIO SSO Guidelines at 1 nS Pulse Width for RT4G150-CQ352 Devices
I/O Standards	Drive Strength (mA)	SSOs Causing GND Bounce	SSOs Causing VDDI Bounce
LVCMOS33/LVTTL	16	38	58
	12	52	58
	8	58	58
	4	58	58
	2	58	58
LVCMOS25	14	58	58
	12	58	58
	8	58	58
	6	58	58
	4	58	58
	2	58	58
LVCMOS18	12	58	58
	10	58	58
	8	58	58
	6	58	58
	4	58	58
	2	58	58
LVCMOS15	8	58	58
	6	58	58
	4	58	58
	2	58	58
LVCMOS12	4	58	58
LVCMOS12	2	58	58

The following table lists the pushout delays for MSIO, when SSO load is 499Ω, in parallel with 50 pF load, in RT4G150-CQ352 production devices.

Table 3-23. Pushout Delays for MSIO in RT4G150-CQ352 Devices
I/O Standards	Drive Strength (mA)	Rising Edge Delay (ps)	Falling Edge Delay (ps)
LVCMOS33/LVTTL	16	312	238
	12	285	233
	8	258	211
	4	203	178
	2	172	163
LVCMOS25	14	314	245
	12	303	247
	8	276	230
	6	255	224
	4	232	207
	2	159	173
LVCMOS18	12	331	256
	10	325	255
	8	303	253
	6	269	245
	4	236	231
	2	203	224
LVCMOS15	8	360	235
	6	343	234
	4	303	246
	2	231	227
LVCMOS12	4	355	156
LVCMOS12	2	198	152