GND Bounce and VCC Bounce

When multiple output drivers switch simultaneously, they induce a voltage drop in the chip or package power distribution. The simultaneous switching momentarily raises the ground voltage within the device relative to the system ground. This apparent shift in the ground potential to a nonzero value is known as Simultaneous Switching Noise (SSN) or ground bounce. Ground bounce voltage is related to inductance present between the device ground and the system ground, and the amount of current sunk by each output. It is denoted in the following equation:

V = L × di ∕ dt

An I/O switching from high-to-low or low-to-high is actually discharging or charging the capacitor that loads the I/O. The resulting value of di∕dt is cumulative and increases with the number of Simultaneously Switching Outputs (SSOs). Therefore, the higher the di∕dt is, the higher is the ground bounce amplitude. The device ground is connected to the system ground (PCB ground) through a series of inductors, comprised of package bond wire, package trace, and board inductance, as shown in the following figure.

Leff = Lbondwire + Ltrace + Lpin

Figure . Sample Switching Output Buffer Showing Parasitic Inductance

As a result, the higher the Leff is, the higher is the amplitude. Problems might arise when ground bounce is transferred from the die to the device pin through the output buffers driving low. If the bounce is higher than the VIL threshold of the driven input, there is a possibility that the glitch is recognized as a legal logic “1”. The same phenomenon applies to VCC, called VCC bounce. Ground bounce and VCC bounce are important noise parameters, but devices usually have more noise margin near high level (“1”) than near low level (“0”). Therefore, ground bounce is considered more often.