2.3 Instruction Set Summary Tables
| Assembled Syntax | Description | Words | Cycles |
|---|---|---|---|
EXCH Wns,Wnd | Swap Wns with Wnd | 1 | 2 |
MOV Ws, Wd | Move Ws to Wd | 0.5/1 | 1 |
MOV.l lit32,Wnd | Move 32-bit unsigned literal to Wnd | 2 | 2 |
MOV.sl lit24,Wnd | Move 24-bit unsigned literal to Wnd; 0 extend to 32-bits | 1 | 1 |
MOV.w lit16,Wnd | Move 16-bit unsigned literal to Wnd; 0 extend to 32-bits | 1 | 1 |
MOV.bz lit8,Wnd | Move 8-bit unsigned literal to Wnd; 0 extend to 32-bits | 1 | 1 |
MOV.l [W15-lit7], Wnd
| Move from system stack with literal offset to Wnd using SP or FP | 0.5 | 1 |
MOV.l Wns, [W15-lit7] Wns, [W14+slit7] | Move from Wns to system stack with literal off-set using SP or FP | 0.5 | 1 |
MOV.l f,Wnd | Move f to Wnd (Word or Long Word)(f < ~1MB) | 1 | 1 |
MOV.b f,Wnd | Move f to Wnd (Byte) | 1 | 1 |
MOV.l Wns,f | Move Wns to f (Word or Long Word)(f < ~1MB) | 1 | 1 |
MOV.w Wns,f | Move Wns to f (Word or Long Word)(f > ~ 1MB) | 2 | 2 |
MOV.b Wns,f | Move Wns to f (Byte) | 1 | 1 |
MOV [Wns+Slit12],Wnd | Move [Wns+Slit12] to Wnd | 1 | 1 |
MOV Wns,[Wnd+Slit12] | Move Wns to [Wnd+Slit12] | 1 | 1 |
MOVIF.l CC, Wb, Wns, Wd | If CC == True Move W1 to [W15++] Else Move W2 to [W15++] where, CC -> Z, N, C, OV, GT, LT, GTU | 1 | 1 |
MOVR.l | Move Ws to Wd with destination Bit Reversed addressing | ||
MOVS.l slit16, Wd | Move signed extended 16-bit literal to Wd | 1 | 1 |
MOVS.b slit8, Wnd | Move 8-bit literal to Wd; no extension. | 1 | 1 |
SWAP Wn | Wn = Word or byte swap Wn | 1 | 1 |
TST f | Test f | 1 | 1 |
TST f,Wnd | Test f and move f to Wnd | 1 | 1 |
| Assembled Syntax | Description | Words | Cycles |
|---|---|---|---|
ADD f,Wn | f = f + Wn | 1 | 1 |
ADD f,Wn,Wn | Wn = f + Wn | 1 | 1 |
ADD.l lit5,Wn | Wn = Wn + lit5 | 0.5 | 1 |
ADD lit16,Wn | Wn = Wn + lit16 | 1 | 1 |
ADD Wb,Ws,Wd | Wd = Wb + Ws | 0.5/1 | 1 |
ADD Wb,lit7,Wd | Wd = Wb + lit7(literal zero-extended) | 1 | 1 |
ADDC f,Wn | f = f + Wn + (C) | 1 | 1 |
ADDC f,Wn,Wn | Wn = f + Wn + (C) | 1 | 1 |
ADDC lit16,Wn | Wn = Wn + lit16 + (C) | 1 | 1 |
ADDC Wb,Ws,Wd | Wd = Wb + Ws + (C) | 0.5/1 | 1 |
ADDC Wb,lit7,Wd | Wd = Wb + lit7 + (C)(literal zero-extended) | 1 | 1 |
DEC f | f = f -1 | 1 | 1 |
DEC f,Wd | W5 = f -1 | 1 | 1 |
DEC Ws,Wd | Wd = Ws - 1 | 1 | 1 |
DEC2 f | f = f -2 | 1 | 1 |
DEC2 f,Wd | W5 = f -2 | 1 | 1 |
DEC2 Ws,Wd | Wd = Ws - 2 | 1 | 1 |
DIVF Wm/Wn | Interruptible Signed 16/16 or 32/16 Fractional Divide | 1 | 1 |
DIVFL Wm/Wn | Interruptible Signed 32/32 Fractional Divide | 1 | 1 |
DIVS.w Wm/Wn | Interruptible Signed 16/16-bit Integer Divide | 1 | 1 |
DIVS.l Wm/Wn | Interruptible Signed 32/16-bit Integer Divide | 1 | 1 |
DIVSL Wm/Wn | Interruptible Signed 32/32 Integer Divide | 1 | 1 |
DIVU.w Wm/Wn | Interruptible Unsigned 16/16-bit Integer Divide | 1 | 1 |
DIVU.l Wm/Wn | Interruptible Unsigned 32/16-bit Integer Divide | 1 | 1 |
DIVUL Wm/Wn | Interruptible Unsigned 32/32 Integer Divide | 1 | 1 |
FLIM Wb, Ws | Force Data (Upper and Lower) Range Limit without Limit Excess Result | 1 | 1 |
FLIM Wb, Ws, Wd | Force Data (Upper and Lower) Range Limit with Limit Excess Flag (Wd=-1) | 1 | 2 |
FLIM.V Wb, Ws, Wd | Force Data (Upper and Lower) Range Limit with Limit Excess Result | 1 | 2 |
INC f | f = f + 1 | 1 | 1 |
INC f,Wd | W5 = f + 1 | 1 | 1 |
INC Ws,Wd | Wd = Ws + 1 | 1 | 1 |
INC2 f | f = f + 2 | 1 | 1 |
INC2 f,Wd | W5 = f + 2 | 1 | 1 |
INC2 Ws,Wd | Wd = Ws +2 | 1 | 1 |
MULSS Wb,Ws,Wnd | {Wd}=signed(Wb) * signed(Ws) | 0.5/1 | 1 |
MULSU Wb,Ws,Wnd | {Wd}=signed(Wb) * unsigned(Ws) | 0.5/1 | 1 |
MULUS Wb,Ws,Wnd | {Wd}=unsigned(Wb) * signed(Ws) | 0.5/1 | 1 |
MULUU Wb,Ws,Wnd | {Wd}=unsigned(Wb) * unsigned(Ws) | 0.5/1 | 1 |
MULSU Wb,lit8,Wnd | {Wd}=signed(Wb) * unsigned(lit8) | 1 | 1 |
MULUU Wb,lit8,Wnd | {Wd}=unsigned(Wb) * unsigned(lit8) | 1 | 1 |
MULSS Wb,slit8,Wnd | {Wd}=signed(Wb) * signed(slit8) | 1 | 1 |
MULUS Wb,slit8,Wnd | {Wd}=unsigned(Wb) * signed(slit8) | 1 | 1 |
MUL f, Wn | W2 = f * Wn | 1 | 1 |
SE Ws,Wnd | Wd = sign-extended Ws | 0.5/1 | 1 |
SUB f,Wn | f = f - Wn | 1 | 1 |
SUB f,Wn,Wn | Wn = f - Wn | 1 | 1 |
SUB.l lit5,Wn | Wn = Wn - lit5 | 0.5 | 1 |
SUB lit16,Wn | Wn = Wn - lit16 | 1 | 1 |
SUB Wb,Ws,Wd | Wd = Wb - Ws | 0.5/1 | 1 |
SUB Ws,lit7,Wd | Wd = Ws - lit7 (literal zero-extended) | 1 | 1 |
SUBB f,Wn | f = f - Wn - (C) | 1 | 1 |
SUBB f,Wn,Wn | Wn = f - Wn - (C) | 1 | 1 |
SUBB lit16,Wn | Wn = Wn - lit16 - (C) | 1 | 1 |
SUBB Wb,Ws,Wd | Wd = Wb - Ws - (C) | 0.5/1 | 1 |
SUBB Ws,lit7,Wd | Wd = Ws - lit7 - (literal zero-extended) | 1 | 1 |
SUBR f,Wn | f = Wn - f | 1 | 1 |
SUBR f,Wn,Wn | Wn = Wn - f | 1 | 1 |
SUBR Wb,Ws,Wd | Wd = Ws - Wb | 0.5/1 | 1 |
SUBR Ws,lit7,Wd | Wd = lit7 - Ws (literal zero-extended) | 0.5/1 | 1 |
SUBBR f,Wn | f = Wn - f - (C) | 1 | 1 |
SUBBR f,Wn,Wn | Wn = Wn -f - (C) | 1 | 1 |
SUBBR Wb,Ws,Wd | Wd = Ws - Wb - (C) | 0.5/1 | 1 |
SUBBR Ws,lit7,Wd | Wd = lit7 - Ws - (C) (literal zero-extended) | 1 | 1 |
ZE Ws,Wnd | Wd = Zero-extend Ws | 0.5/1 | 1 |
| Assembled Syntax | Description | Words | Cycles |
|---|---|---|---|
AND f,Wn | f = f .AND. Wn | 1 | 1 |
AND f,Wn,Wn | W0 = f .AND. Wn | 1 | 1 |
AND lit16,Wn | Wn = Wn .AND. lit16 | 1 | 1 |
AND Wb,Ws,Wd | Wd = Wb .AND. Ws | 0.5/1 | 1 |
AND Wb,lit7,Wd | Wd = Wb .AND. Lit7 (literal zero-extended) | 1 | 1 |
AND1 Wb,lit7,Wd | Wd = Wb .AND. Lit7 (literal zero-extended) | 1 | 1 |
CLR f | f = 0x0000 | 1 | 1 |
CLR Wd | Wd = 0x0000 | 1 | 1 |
COM f | f = f | 1 | 1 |
COM f,Wd | Wd = f | 1 | 1 |
COM Ws,Wd | Wd = Ws | 0.5/1 | 1 |
IOR f,Wn | f = f .IOR. Wn | 1 | 1 |
IOR f,Wn,Wn | Wn = f .IOR. Wn | 1 | 1 |
IOR lit16,Wn | Wn = Wn .IOR. lit16 | 1 | 1 |
IOR Wb,Ws,Wd | Wd = Wb .IOR. Ws | 0.5/1 | 1 |
IOR Wb,lit7,Wd | Wd = Wb .IOR. lit7 | 1 | 1 |
NEG f | f = f + 1 | 1 | 1 |
NEG f,Wd | Wd = f + 1 | 1 | 1 |
NEG Ws,Wd | Wd = Ws + 1 | 0.5/1 | 1 |
SETM f | f = 0xFFFF | 1 | 1 |
SETM Wd | Wd = 0xFFFF | 1 | 1 |
XOR f,Wn | f = f .XOR. Wn | 1 | 1 |
XOR f,Wn,Wn | Wn = f .XOR. Wn | 1 | 1 |
XOR lit16,Wn | Wn = Wn .XOR. lit16 | 1 | 1 |
XOR Wb,Ws,Wd | Wd = Wb .XOR. Ws | 0.5/1 | 1 |
XOR Wb,lit7,Wd | Wd = Wb .XOR. Lit7 (literal zero-extended) | 1 | 1 |
| Assembled Syntax | Description | Words | Cycles |
|---|---|---|---|
ASR f | f = Arithmetic Right Shift f by 1 | 1 | 1 |
ASR f,Wn | Wn = Arithmetic Right Shift f by 1 | 1 | 1 |
ASR Ws,Wd | Wd = Arithmetic Right Shift Ws by 1 | 0.5/1 | 1 |
ASR Ws,Wb,Wd | Wnd = Arithmetic Right Shift Ws by Wb | 0.5/1 | 1 |
ASR Ws,lit5,Wd | Wnd = Arithmetic Right Shift Ws by lit5 | 0.5/1 | 1 |
ASRM Ws, lit5, Wnd | Wnd = Arithmetic Right Shift Ws by lit5, then logically OR with next lsw | 1 | 2 |
ASRM Ws, Wb, Wnd | Wnd = Arithmetic Right Shift Ws by Wb, then logically OR with next lsw | 1 | 2 |
LSR f | f = Logical Right Shift f by 1 | 1 | 1 |
LSR f,Wd | Wd = Logical Right Shift f by 1 | 1 | 1 |
LSR Ws,Wd | Wd = Logical Right Shift Ws by 1 | 0.5/1 | 1 |
LSR Ws,Wb,Wd | Wnd = Logical Right Shift Ws by Wns | 0.5/1 | 1 |
LSR Ws,lit5,Wd | Wnd = Logical Right Shift Ws by lit5 | 0.5/1 | 1 |
LSRM Ws, lit5, Wnd | Wnd = Logical Right Shift Ws by lit5, then logically OR with next lsw | 1 | 2 |
LSRM Ws, Wb, Wnd | Wnd = Logical Right Shift Ws by Wb, then logically OR with next lsw | 1 | 2 |
RLC f | f = Rotate Left through Carry f | 1 | 1 |
RLC f,Wd | Wd = Rotate Left through Carry f | 1 | 1 |
RLC Ws,Wd | Wd = Rotate Left through Carry Ws | 0.5/1 | 1 |
RLNC f | f = Rotate Left (No Carry) f | 1 | 1 |
RLNC f,Wd | Wd = Rotate Left (No Carry) f | 1 | 1 |
RLNC Ws,Wd | Wd = Rotate Left (No Carry) Ws | 0.5/1 | 1 |
RRC f | f = Rotate Right through Carry f | 1 | 1 |
RRC f,Wd | Wd = Rotate Right through Carry f | 1 | 1 |
RRC Ws,Wd | Wd = Rotate Right through Carry Ws | 0.5/1 | 1 |
RRNC f | f = Rotate Right (No Carry) f | 1 | 1 |
RRNC f,Wd | Wd = Rotate Right (No Carry) f | 1 | 1 |
RRNC Ws,Wd | Wd = Rotate Right (No Carry) Ws | 0.5/1 | 1 |
SL f | f = Left Shift f by 1 | 1 | 1 |
SL f,Wd | Wd = Left Shift f by 1 | 1 | 1 |
SL Ws,Wd | Wd = Left Shift Ws by 1 | 0.5/1 | 1 |
SL Ws,Wb,Wnd | Wnd = Left Shift Wb by Wns | 0.5/1 | 1 |
SL Ws,lit5,Wnd | Wnd = Left Shift Ws by lit5 | 0.5/1 | 1 |
SLM Ws, lit5, Wnd | Wnd = Left Shift Wb by lit5, then logically OR with next msw | 1 | 2 |
SLM Ws, Wb, Wnd | Wnd = Left Shift Wb by Wb, then logically OR with next msw | 1 | 2 |
| Assembled Syntax | Description | Words | Cycles |
|---|---|---|---|
BCLR.b f,bit3 | Bit Clear f | 1 | 1 |
BCLR Ws,bit5 | Bit Clear Ws | 0.5/1 | 1 |
BFEXT bit5,wid6,Ws,Wb | Bit Field Extract from Ws to Wb | 1 | 1 |
BFEXT bit5,wid6,f,Wb | Bit Field Extract from f to Wb | 2 | 2 |
BFINS bit5,wid6,Wb,Ws | Bit Field Insert from Wb into Ws | 1 | 1 |
BFINS bit5,wid6,Wb,f | Bit Field Insert from Wb into f | 2 | 2 |
BFINS bit5, wid6, lit16, Ws | Bit Field Insert lit8 into Ws | 2 | 2 |
BSET.b f,bit3 | Bit Set f | 1 | 1 |
BSET Ws,bit5 | Bit Set Ws | 0.5/1 | 1 |
BSW.C Ws,Wb | Write C or Z bit to Ws<Wb> | 1 | 1 |
BSW.Z Ws,Wb | Write C or Z bit to Ws<Wb> | 0.5/1 | 1 |
BTG.b f,bit3 | Bit Toggle f | 1 | 1 |
BTG Ws,bit5 | Bit Toggle Ws | 0.5/1 | 1 |
BTST.b f,bit3 | Bit Test f | 1 | 1 |
BTST.C Ws,bit5 | Bit Test Ws to C | 0.5/1 | 1 |
BTST.Z Ws,bit5 | Bit Test Ws to Z | 1 | 1 |
BTST.C Ws,Wb | Bit Test Ws<Wb> to C | 0.5/1 | 1 |
BTST.Z Ws,Wb | Bit Test Ws<Wb> to Z | 1 | 1 |
BTSTS.b f,bit3 | Bit Test then Set f | 1 | 1 |
BTSTS.C Ws,bit5 | Bit Test Ws to C then Set | 0.5/1 | 1 |
BTSTS.Z Ws,bit5 | Bit Test Ws to Z then Set | 1 | 1 |
FBCL Ws,Wnd | Find Bit Change from Left (MSb) Side | 1 | 1 |
FF1L Ws,Wnd | Find First One from Left (MSb) Side | 1 | 1 |
FF1R Ws,Wnd | Find First One from Right (LSb) Side | 1 | 1 |
| Assembled Syntax | Description | Words | Cycles |
|---|---|---|---|
CP f,Ws | Compare f with Ws | 1 | 1 |
CP Ws,lit13 | Compare Ws with lit13 (literal zero-extended) | 1 | 1 |
CP Wb,lit16 | Compare Wb with lit16 (literal zero-extended) | 1 | 1 |
CP Wb, Ws | Compare Wb with Ws | 0.5/1 | 1 |
CP0 f | Compare f with 0x0000 | 1 | 1 |
CP0 Ws | Compare Ws with 0x0000 (substitute CPLS Ws ,#0) | 1 | 1 |
CPB f,Ws | Compare f with Ws, with borrow | 1 | 1 |
CP Wb,lit13 | Compare Wb with lit13, with borrow (literal zero-extended) | 1 | 1 |
CP Wb,lit16 | Compare Wb with lit16, with borrow (literal zero-extended) | 1 | 1 |
CPB Wb,Ws | Compare Borrow Wb with Ws | 0.5/1 | 1 |
DTB Wn,Label | Decrement Wn, then branch if not zero | 1 | 1(2/3) |
| Assembled Syntax | Description | Words | Cycles |
|---|---|---|---|
BRA Label | Branch Unconditionally | 1 | 1 |
BRA Wn | Computed Branch | 1 | 2 |
BRA C,Label | Branch if Carry | 1 | 1(2/3) |
BRA GE,Label | Branch if greater than or equal | 1 | 1(2/3) |
BRA GEU,Label | Branch if unsigned greater than or equal | 1 | 1(2/3) |
BRA GT,Label | Branch if greater than | 1 | 1(2/3) |
BRA GTU,Label | Branch if unsigned greater than | 1 | 1(2/3) |
BRA LE,Label | Branch if less than or equal | 1 | 1(2/3) |
BRA LEU,Label | Branch if unsigned less than or equal | 1 | 1(2/3) |
BRA LT,Label | Branch if less than | 1 | 1(2/3) |
BRA LTU,Label | Branch if unsigned less than | 1 | 1(2/3) |
BRA N,Label | Branch if Negative | 1 | 1(2/3) |
BRA NC,Label | Branch if Not Carry | 1 | 1(2/3) |
BRA NN,Label | Branch if Not Negative | 1 | 1(2/3) |
BRA NOV,Label | Branch if Not Overflow | 1 | 1(2/3) |
BRA NZ,Label | Branch if Not Zero | 1 | 1(2/3) |
BRA Z,Label | Branch if Zero | 1 | 1(2/3) |
BREAK | Stop user code execution | 0.5/1 | 1 |
CALL Label | Call subroutine (label < ~ 16MB) | 1 | 1 |
CALL Wns | Call indirect subroutine at address [W11] | 1 | 2 |
GOTO Label | Goto address (address < ~ 16MB) | 1 | 1 |
GOTO Wn | Go to indirect address at [W11] | 1 | 2 |
RCALL Label | Relative Call | 1 | 1 |
RCALL Wns | Computed Call | 1 | 2 |
REPEAT lit15 | Repeat Next Instruction lit15+1 times | 1 | 1 |
REPEAT lit5 | Repeat Next Instruction lit5+1 times | 0.5 | 1 |
REPEAT Wn | Repeat Next Instruction (Wn)+1 times | 1 | 1 |
RETFIE | Return from interrupt enable | 0.5 | 4 |
RETLW lit16,Wn | Return from Subroutine with literal in Wn | 1 | 3 |
RETURN | Return from Subroutine | 0.5 | 3 |
| Assembled Syntax | Description | Words | Cycles |
|---|---|---|---|
BOOTSWP | Swap Active and Inactive address space | 0.5 | 2 |
CTXTSWP lit3 | Swap to CPU register context #2 | 0.5 | 2 |
CTXTSWP Wn | Swap to CPU register context defined in Wn[2:0] | 1 | 2 |
LNK lit16 | Link frame pointer | 1 | 1 |
LNK lit7 | Link frame pointer (literal < 128) | 0.5 | 1 |
POP f | Pop f from top of stack (TOS) | 1 | 1 |
POP {[--Ws],} Wnd | Pop Wnd Register from system stack. | 0.5 | 1 |
POP Fd | Pop Fd Register from system stack. | 0.5 | 1 |
PUSH f | Push f to top of stack (TOS) | 1 | 1 |
PUSH Wns, {[Wd++]} | Push Wns Register to system stack | 0.5 | 1 |
PUSH Fs | Push Fs Register to system stack | 0.5 | 1 |
ULNK | Unlink frame pointer | 0.5 | 1 |
| Assembled Syntax | Description | Words | Cycles |
|---|---|---|---|
CLRWDT | Clear Watchdog Timer | 0.5 | 1 |
DISICTL lit3 {,Wd} | Disable interrupts at IPL <= lit3 Optionally save prior IPL threshold to Wd | 1 | 1 |
DISICTL Wns {,Wd} | Disable interrupts at IPL <= Wns[2:0] Optionally save prior IPL threshold to Wd | 1 | 1 |
NEOP | None executable NOP (16-bit instruction pad) | 0.5 | 0 |
NOP | No Operation | 1 | 1 |
NOPR | No Operation | 1 | 1 |
PWRSAV mode | Go into standby mode | 0.5 | 2 |
RESET | Software device RESET | 1 | 1 |
| Assembled Syntax | Description | Words | Cycles |
|---|---|---|---|
ADD A | Add Accumulators | 0.5 | 1 |
ADD Ws,Slit6, A | Signed Add to Accumulator | 1 | 1 |
BRA OA,Label | Branch if accumulator A overflow | 1 | 1(2/3) |
BRA OB,Label | Branch if accumulator B overflow | 1 | 1(2/3) |
BRA OV,Label | Branch if Overflow | 1 | 1(2/3) |
BRA SA,Label | Branch if accumulator A saturated | 1 | 1(2/3) |
BRA SB,Label | Branch if accumulator B saturated | 1 | 1(2/3) |
CLR A | Clear Accumulator | 0.5 | 1 |
ED Wx, Wy, A, AWB | Euclidean Distance | 1 | 2 |
EDAC Wx, Wy, A, AWB | Euclidean Distance Accumulate | 1 | 2 |
LAC Ws,Slit6, A | Load Accumulator (16/32-bit), literal shift | 1 | 1 |
LLAC.l Ws Slit6, A | Load Lower (LS-word of) Accumulator (32-bit), literal shift | 1 | 1 |
LUAC.l Ws, Slit6, A | Load Upper (LS-byte) of Accumulator (32-bit), literal shift | 1 | 1 |
MAC Wx, Wy, A, AWB | Multiply and Accumulate | 1 | 1 |
MAX Wb, Ws | Force Data Maximum Range Limit | 1 | 1 |
MAX A | Force Data Maximum Range Limit | 0.5 | 1 |
MAX.V A, Wd | Force Data Maximum Range Limit with Result | 1 | 2 |
MIN Wb, Ws | Force Data Minimum Range Limit | 1 | 1 |
MIN A | Force Data Minimum Range Limit | 0.5 | 1 |
MIN.V A, Wd | Force Data Minimum Range Limit with Result | 1 | 2 |
MULISS Wb,Ws,A | Integer: Acc(A or B) = signed(Wb) * signed(Ws) | 1 | 1 |
MULFSS Wb,Ws,A | Fractional: Acc(A or B) = signed(Wb) * signed(Ws) | 1 | 1 |
MULISU Wb,Ws,A | Integer: Acc(A or B) = signed(Wb) * unsigned(Ws) | 1 | 1 |
MULFSU Wb,Ws,A | Fractional: Acc(A or B) = signed(Wb) * unsigned(Ws) | 1 | 1 |
MULIUS Wb,Ws,A | Integer: Acc(A or B) = unsigned(Wb) * signed(Ws) | 1 | 1 |
MULFUS Wb,Ws,A | Fractional: Acc(A or B) = unsigned(Wb) * signed(Ws) | 1 | 1 |
MULIUU Wb,Ws,A | Integer: Acc(A or B) = unsigned(Wb) * unsigned(Ws) | 1 | 1 |
MULFUU Wb,Ws,A | Fractional: Acc(A or B) = unsigned(Wb) * unsigned(Ws) | 1 | 1 |
MULISS Wb,slit8,A | Integer: Acc(A or B) = signed(Wb) * signed(slit8) | 1 | 1 |
MULFSS Wb,slit8,A | Integer: Acc(A or B) = signed(Wb) * signed(slit8) | 1 | 1 |
MULISU Wb,lit8,A | Integer: Acc(A or B) = signed(Wb) * unsigned(lit8) | 1 | 1 |
MULFSU Wb,lit8,A | Integer: Acc(A or B) = signed(Wb) * unsigned(lit8) | 1 | 1 |
MULIUS Wb,slit8,A | Integer: Acc(A or B) = signed(Wb) * signed(slit8) | 1 | 1 |
MULFUS Wb,slit8,A | Integer: Acc(A or B) = signed(Wb) * signed(slit8) | 1 | 1 |
MULIUU Wb,lit8,A | Integer: Acc(A or B) = signed(Wb) * unsigned(lit8) | 1 | 1 |
MULFUU Wb,lit8,A | Integer: Acc(A or B) = signed(Wb) * unsigned(lit8) | 1 | 1 |
MPY Wx, Wy, A, AWB | Multiply Wm by Wn to Accumulator | 1 | 1 |
MPYN Wx, Wy, A, AWB | -(Multiply Wm by Wn) to Accumulator | 1 | 1 |
MSC Wx, Wy, A, AWB | Multiply and Subtract from Accumulator | 1 | 1 |
NEG A | Negate Accumulator | 0.5 | 1 |
NORM A, Wd | Normalize Accumulator | 1 | 1 |
SAC A,Slit6, Wd | Store Accumulator (16/32-bit) | 1 | 1 |
SACR A,Slit6,Wd | Store Rounded Accumulator (16/32-bit), literal shift | 1 | 1 |
SACR A,Ws,Wd | Store Rounded Accumulator (16/32-bit), Wb shift | 1 | 1 |
SLAC.l A,Slit6,Wd | Store Lower (LS-Word of) Accumulator (32-bit), literal shift | 1 | 1 |
SUAC.l A,Slit6,Wd | Store sign extended Upper (MS-Byte of) Accumulator (32-bit), literal shift | 1 | 1 |
SFTAC A,Wn | Arithmetic Shift by (Wn) Accumulator | 1 | 1 |
SFTAC A,Slit7 | Arithmetic Shift by Slit7 Accumulator | 1 | 1 |
SQR Wx, A, AWB | Square to Accumulator | 1 | 1 |
SQRAC Wx, A, AWB | Square and Accumulate | 1 | 1 |
SQRN Wx, A, AWB | Negated Square to Accumulator | 1 | 1 |
SQRSC Wx, A, AWB | Square and Subtract from Accumulator | 1 | 1 |
SUB A | Subtract Accumulators | 0.5 | 1 |
SUB Ws,Slit6, A | Signed Subtract from Accumulator | 1 | 1 |
| Assembled Syntax | Description | Words | Cycles |
|---|---|---|---|
ABS Fs, Fd | Absolute value of Fs | 1 | 1 |
ADD Fb, Fs, Fd | Fd = Fb + Fs | 1 | 2 |
AND lit16, FSR | FSR = FSR AND lit16 | 1 | 1 |
AND lit16, FCR | FCR = FCR AND lit16 | 1 | 1 |
AND lit16, FEAR | FEAR = FEAR AND lit16 | 1 | 1 |
COS Fs , Fd | Fd = COS(Fs) | 1 | 4 |
CPQ Fb, Fs | Compare Fb with Fs, Quiet Signaling | 1 | 1 |
CPS Fb, Fs | Compare Fb with Fs, Signaling | 1 | 1 |
DI2F Fs, Fd | Convert Double Word (64-bit) Integer to Floating-Point, Fs (integer) -->Fd (float) | 1 | 2 |
DIV Fb, Fs, Fd | Signed Floating-Point Divide, Fd = Fb/Fs | 1 | 11/32 |
FBRA EQ,Label | Floating Point Branch if Equal | 1 | 1(2/3) |
FBRA NE,Label | Floating Point Branch if Not Equal | 1 | 1(2/3) |
FBRA GT,Label | Floating Point Branch if Greater Than | 1 | 1(2/3) |
FBRA GE,Label | Floating Point Branch if Greater Than or Equal | 1 | 1(2/3) |
FBRA LT,Label | Floating Point Branch if Less Than | 1 | 1(2/3) |
FBRA LE,Label | Floating Point Branch if Less Than or Equal | 1 | 1(2/3) |
FBRA OR,Label | Floating Point Branch if Ordered | 1 | 1(2/3) |
FBRA UNE,Label | Floating Point Branch if Unordered or Not Equal | 1 | 1(2/3) |
FBRA UEQ,Label | Floating Point Branch if Unordered or Equal | 1 | 1(2/3) |
FBRA ULE,Label | Floating Point Branch if Unordered or Less Than or Equal | 1 | 1(2/3) |
FBRA ULT,Label | Floating Point Branch if Unordered or Less Than | 1 | 1(2/3) |
FBRA UGE,Label | Floating Point Branch if Unordered or Greater Than or Equal | 1 | 1(2/3) |
FBRA UGT,Label | Floating Point Branch if Unordered or Greater Than | 1 | 1(2/3) |
FBRA UN,Label | Floating Point Branch if Unordered | 1 | 1(2/3) |
FLIM Fb, Fs, Fd | Force Signed Data Limit, If Fd > Fs Then Fd = Fs If Fd < Fb then Fd = Fb | 1 | 1 |
F2DI Fs, Fd | Convert Floating-Point Fs to Double Word (64-bit) Integer,Fs (float)--> Fd (integer) | 1 | 1/2 |
F2LI Fs, Fd | Convert Floating-Point Fs to Long Word (32-bit) Integer,Fs (float)-->Fd (integer) | 1 | 1/2 |
IOR lit16, FSR | Inclusive OR FSR, FSR = FSR .IOR. lit16 | 1 | 1 |
IOR lit16, FCR | Inclusive OR FCR, FCR = FCR .IOR. Lit16 | 1 | 1 |
IOR lit16, FEAR | Inclusive OR FEAR, FEAR = FEAR .IOR. Lit16 | 1 | 1 |
LI2F Fs, Fd | Convert Long Word (32-bit) Integer to Floating-Point,Fs (integer)-->Fd (float) | 1 | 1 |
MAC Fb, Fs, Fd | Floating-Point Signed Multiply and Accumulate,Fd = Fd +(Fb * Fs) | 1 | 3/4 |
MAX Fb, Fs, Fd | Select the Signed Maximum of Fb and Fs {IEEE 754-2019 maximum(x,y)}, if Fs >= Fb then Fd = Fs Else Fd= Fb | 1 | 1 |
MAXNM Fb, Fs, Fd | Select the Signed Maximum of Fb and Fs {IEEE 754-2019 maxmumNumber(x,y)},, if Fs >= Fb then Fd = Fs Else Fd= Fb | 1 | 1 |
MIN Fb, Fs, Fd | Select the Signed Minimum of Fb and Fs {IEEE 754-2019 minimum(x,y)}, if Fs =< Fb then Fd = Fs Else Fd= Fb | 1 | 1 |
MINNM Fb, Fs, Fd | Select the Signed Minimum of Fb and Fs [minmumNumber()], if Fs =< Fb then Fd = Fs Else Fd= Fb | 1 | 1 |
MOV.l Fs, Wd | Move coprocessor register to Wd | 0.5/1 | 1 |
MOV.l Ws, Fd | Move Ws to coprocessor register | 0.5/1 | 1 |
MOV.l lit32,Fd | Move 32-bit unsigned literal to coprocessor register | 2 | 2 |
MOV Fs,[Wnd+Slit12] | Move Fs to [Wnd+Slit12] | 1 | 1 |
MOV [Wns+Slit12],Fd | Move [Wns+Slit12] to Fd | 1 | 1 |
MOV Fs, Fd | Move Fs to Fd | 1 | 1 |
MOV index, Fd | Fd = Constant table (index) Fd | 1 | 1 |
MUL Fb, Fs, Fd | Fd = Fb * Fs | 1 | 3 |
NEG Fs, Fd | Fd = -Fs | 1 | 1 |
SIN Fs, Fd | Fd = SIN(Fs) | 1 | 4 |
SQRT Fs, Fd | Fd = √Fs | 1 | 10/13 |
SUB Fb, Fs, Fd | Fd= Fb- Fs | 1 | 2 |
TST Fs | Test Fs | 1 | 1 |