3 What’s New?

Version 1.1.1

Removed the MCC notification to set the TMR2 clock source to F_osc/4 so as not to limit the clock source options for the Interrupt Frequency diagnostic test

Version 1.1.0

Support for the PIC16F131xx⁽¹⁾ device family:
- PIC16F13113, PIC16F13114, PIC16F13115, PIC16F13123, PIC16F13124, PIC16F13125, PIC16F13143, PIC16F13144, PIC16F13145
Intermediate Result Bank field in the SW_CPU_SELF_TEST_LIB_01 tab to select a GPR bank to store intermediate result variables
Required Extra Linker Options text area in the Diagnostic Modules tab with the linker options to add to the project properties for SW_CPU_SELF_TEST_LIB_01
Added diag_pic16f_device_macros.h file generation in SW_SRAM_MARCH_TEST_01 for supported PIC16F device families to account for differences and similarities in device architectures
Updated SW_WATCHDOG_SIMPLE_TIMER_STARTUP_TEST_01 to use the DIAG_NOT_EXECUTED state
Updates for the following PIC16 diagnostics:
- SW_CPU_REGISTER_TEST_01 v2.0.2
- SW_CPU_SELF_TEST_LIB_01 v1.0.1
- SW_FLASH_MEMORY_CHECKSUM_CRC_TEST_01 v2.0.2
- SW_SRAM_MARCH_TEST_01 v3.0.2
- SW_WATCHDOG_SIMPLE_TIMER_STARTUP_TEST_01 v2.0.2
- SW_CLOCK_PERIODIC_MONITOR_01 v2.0.2
Updates for the following PIC18 diagnostics:
- SW_CPU_REGISTER_TEST_01 v2.0.2
- SW_CPU_SELF_TEST_LIB_01 v1.0.1
- SW_CPU_REGISTER_RESET_STATE_CHECK_01 v1.1.3
- SW_SRAM_MARCH_TEST_01 v3.0.2
Bug fixes for the following diagnostics (refer to Repairs and Enhancements for more information):
- SW_CPU_REGISTERS_01
- SW_CPU_SELF_TEST_LIB_01
- SW_FLASH_MEMORY_CHECKSUM_CRC_TEST_01
- SW_SRAM_MARCH_TEST_01
- SW_CLOCK_PERIODIC_MONITOR_01
- SW_CLOCK_PERIODIC_MONITOR_02
- SW_WATCHDOG_SIMPLE_TIMER_STARTUP_TEST_01

Version 1.0.0

Notes:

The SW_CLOCK_PERIODIC_MONITOR_01 test is not supported for the PIC16F131xx device family.