21.5.1 Control A

Name: CTRLA
Offset: 0x00
Reset: 0x00
Property: -

Bit 76543210 
  RUNSTDBY SYNCUPD CLKSEL[1:0]ENABLE 
Access R/WR/WR/WR/WR/W 
Reset 00000 

Bit 6 – RUNSTDBY Run in Standby

Writing a ‘1’ to this bit will enable the peripheral to run in Standby Sleep mode. Not applicable when CLKSEL is set to 0x2 (CLK_TCA).

Bit 4 – SYNCUPD Synchronize Update

When this bit is written to ‘1’, the TCB will restart whenever TCA0 is restarted or overflows. This can be used to synchronize capture with the PWM period.

Bits 2:1 – CLKSEL[1:0] Clock Select

Writing these bits selects the clock source for this peripheral.
ValueNameDescription
0x0CLKDIV1CLK_PER
0x1CLKDIV2CLK_PER / 2
0x2CLKTCAUse CLK_TCA from TCA0
0x3Reserved

Bit 0 – ENABLE Enable

Writing this bit to ‘1’ enables the Timer/Counter type B peripheral.