4 Example: PFC Development Board
Following the procedure outlined in the previous section and utilizing the code snippet provided in Figure 2-4, the plant measurement for the Power Factor Correction (PFC) system has been successfully acquired. It is essential to ensure that the PFC board operates in DC mode before conducting the BODE measurement. For this particular setup, the PFC has been configured to run with an input voltage of 20V and an output voltage of 40V.
The PFC operates on a fixed frequency with a variable duty cycle scheme. To facilitate the measurement, a disturbance was injected into the nominal duty cycle. During the measurement process, this duty cycle is modulated by the injected signal, which subsequently modulates the output voltage.
At a frequency of 1.35 Hz, both the time domain and frequency domain show similar values, with a gain of 11.3 dB. This indicates a consistent system response at this frequency across both domains. In the time domain, as shown in Figure 4-1, this is seen in the signal’s amplitude over time, while in the frequency domain, as shown in Figure 4-2, it is shown by the magnitude of the BODE plot gain.
As per the LLC example, the gain needs to be compensated. In this case, the duty cycle is modulated, so we need to account for the difference between the DAC full-scale code (4095) and the range of digital values loaded into the duty cycle register PGxDC that correspond to the maximum and minimum duty cycles. Given a switching frequency of 100 kHz and minimum and maximum duty cycles of 4% and 96%, respectively, (PGxDC_max - PGxDC_min) = 18400.
