5.2.6.15 LCDC PWM Controller
The LCDC integrates a Pulse Width Modulation (PWM) Controller.
This block generates the LCD contrast control signal (LCD_PWM) that controls the display's contrast by software. LCDC_PWM is an 8-bit PWM signal that can be converted to an analog voltage with a simple passive filter.
The PWM module has a free-running counter whose value is compared against a compare register (LCDC_LCDCFG6.PWMCVAL). If the value in the counter is less than that in the register, LCDC_PWM is asserted with the value in the compare register (LCDC_LCDCFG6.PWMCVAL). Otherwise, the opposite value is output. Thus, a periodic waveform with a pulse width proportional to the value in the compare register is generated.
Due to the comparison mechanism, the output pulse has a width between 0 and 255 PWM counter cycles. Thus, by adding a simple passive filter outside the chip, an analog voltage between 0 and (255/256) × VDD can be obtained for the positive polarity case, or between (1/256) × VDD and VDD for the negative polarity case. Other voltage values can be obtained by adding active external circuitry.
For PWM mode, the counter frequency can be adjusted to 16 different values using LCDC_LCDCFG6.PWMPS.
The PWM module can be fed with the slow clock or the peripheral clock (MCK), depending on LCDC_CFG0.CLKPWMSEL.
LCD display panels have different backlight specifications in terms of minimum/maximum values for PWM frequency. If the LCDC PWM frequency range does not match the LCD display panel, it is possible to use the standalone PWM Controller (refer to the section “Pulse Width Modulation Controller (PWM)”) to drive the backlight.