8.6.5.7.4 Tx Event FIFO Element

Each element stores information about transmitted messages. By reading the Tx Event FIFO the processor gets this information in the order the messages were transmitted. Status information about the Tx Event FIFO can be obtained from register TXEFS.

E1A: When CCCR.WMM = ‘0’ and no TSU is used (CCCR.UTSU = ‘0’), E1A.TXTS[15:0] holds the 16-bit timestamp generated by the MCAN internal timestamping logic.

E1B: When 16-bit Message Markers are enabled (CCCR.WMM =’1’) or when CCCR.UTSU = ‘1’, E1B.MM[15:8] holds the upper 8 bit of the Wide Message Marker. When a TSU is used (CCCR.UTSU = ‘1’) and when bit TSCE of the related Tx Buffer element is set, E1B.TSC = ‘1’ and E1B.TXTSP[3:0] holds the number of the TSU Timestamp register which holds the 32-bit timestamp captured by the TSU. Else E1B.TSC = ‘0’ and E1B.TXTSP[3:0] is not valid.

Table 8-50. Tx Event FIFO Element
313029282726252423222120191817161514131211109876543210
E0ESIXTDRTRID[28:0]
E1AMM[7:0]ET[1:0]FDFBRSDLC[3:0]TXTS[15:0]
E1BMM[7:0]ET[1:0]FDFBRSDLC[3:0]MM[15:8]TSCTXTSP[3:0]

E0 Bit 31 ESI: Error State Indicator

0: Transmitting node is error active.

1: Transmitting node is error passive.

E0 Bit 30 XTD: Extended Identifier

0: 11-bit standard identifier.

1: 29-bit extended identifier.

E0 Bit 29 RTR: Remote Transmission Request

0: Data frame transmitted.

1: Remote frame transmitted.

E0 Bits 28:0 ID[28:0]: Identifier

Standard or extended identifier depending on bit XTD. A standard identifier is stored into ID[28:18].

E1A/B Bits 31:24 MM[7:0]: Message Marker

Copied from Tx Buffer into Tx Event FIFO element for identification of Tx message status.

E1A/B Bit 23:22 ET[1:0]: Event Type

0: Reserved

1: Tx event

2: Transmission in spite of cancellation (always set for transmissions in DAR mode)

3: Reserved

E1A/B Bit 21 FDF: FD Format

0: Standard frame format.

1: CAN FD frame format (new DLC-coding and CRC).

E1A/B Bit 20 BRS: Bit Rate Switch

0: Frame transmitted without bit rate switching.

1: Frame transmitted with bit rate switching.

E1A/B Bits 19:16 DLC[3:0]: Data Length Code

0-8: CAN + CAN FD: frame with 0-8 data bytes transmitted.

9-15: CAN: frame with 8 data bytes transmitted.

9-15: CAN FD: frame with 12/16/20/24/32/48/64 data bytes transmitted

E1A/B Bits 15:0 TXTS[15:0]: Tx Timestamp

Timestamp Counter value captured on start of frame transmission. Resolution depending on configuration of the Timestamp Counter Prescaler MCAN_TSCC.TCP.

E1B Bit 4 TSC: Timestamp Captured

0: No timestamp captured

1: Timestamp captured and stored in TSU Timestamp register referenced by E1B.TXTSP

E1B Bits 3:0 TXTSP[3:0]: Tx Timestamp Pointer

Number of the TSU Timestamp register (TS0..15) where the related timestamp is stored.