4.17.2 Embedded Characteristics

The Power Management Controller provides the following clocks:

Main System Bus Clock (MCK)—programmable from a few hundred Hz to the maximum operating frequency of the device. It is available to the modules running permanently.
Processor Clock (CPU_CLK)—can be tuned through a frequency scaler module and automatically switched off when entering the processor in Sleep mode.
Free-Running Processor Clock (FCLK)—the source clock of CPU_CLK. Is not affected when Sleep mode is activated.
UHDP Clocks (UHP48M and UHP12M)—required by USB Host Device Port operations.
Peripheral Clocks with independent on/off control, provided to the peripherals. Each peripheral clock is inherited from MCK.
Programmable Clock Outputs (PCKx), selected from the clock generator outputs to drive the device PCKx pins.
Generic Clock (GCLK) with controllable division and on/off control, independent of MCK and CPU_CLK. Provided to selected peripherals. Refer to the table “Peripheral Identifiers” for more details on GCLK availability per peripheral.

The Power Management Controller also provides the following features on clocks: