9.4.6.10.1 Input-Output Transfer Functions

The ADC can be configured to operate in the following input voltage modes:

Single-Ended—ADC_CCR.DIFFx = 0 and ADC_PDR.PDIFFx = 0. This is the default mode after a reset.
Differential—ADC_CCR.DIFFx = 1 and ADC_PDR.PDIFFx = 0 (see the figure below). In Differential mode, the ADC requires differential input signals having a VDD/2 common mode voltage (refer to the section “Electrical Characteristics”).
• Pseudo-Differential—ADC_PDR.PDIFFx = 1. In Pseudo-Differential mode, one of the analog pins is used as the negative input of the ADC (see table Input Pins and Channel Numbers in Pseudo-Differential Mode). The ADC samples the other analog inputs with respect to this one. The common mode input range is 0 to VDD (refer to the section “Electrical Characteristics”).

The following equations provide the unsigned ADC input-output transfer function in each mode⁽¹⁾. With signed conversions (see field ADC_EMR.SIGNMODE), subtract 2047 from the ADC_LCDR.DATA value given below. Note that the Single-Ended mode introduces a x2 gain compared to the Pseudo-Differential mode.

In the formula, REFP = VREFP, REFN = VREFN.

Single-Ended mode:

ADC_LCDR.LDATA = \frac{ADx - REFN}{REFP - REFN} \times 2^{12}

Differential mode:

ADC_LCDR.LDATA = (1 + \frac{ADx - ADx+1}{REFP - REFN}) \times 2^{11}

Pseudo-Differential mode:

ADC_LCDR.LDATA = (1 + \frac{ADx - AD7}{REFP - REFN}) \times 2^{11}

Note: Equations assume ADC_EMR.OSR = 1

If ADC_MR.ANACH is set, the ADC can manage both differential channels and single-ended channels. If ADC_MR.ANACH is cleared, the parameters defined in ADC_CCR are applied to all channels.

The following tables provide the internal positive and negative ADC inputs assignment with respect to the programmed mode (ADC_CCR.DIFFx and ADC_PDR.PDIFFx).

For example, if Differential mode is required on channel 0, input pins AD0 and AD1 are used. In this case, only channel 0 must be enabled by writing a 1 to ADC_CHER.CH0.

Table 9-6. Input Pins and Channel Numbers in Single-Ended and Differential Modes
Internal ADC Inputs (VIN+, VIN-)		Channel Number
Single-Ended Mode	Differential Mode	Single-Ended Mode	Differential Mode
AD0, ADVREFN	AD0, AD1	CH0	CH0
AD1, ADVREFN	–	CH1	CH0
AD2, ADVREFN	AD2, AD3	CH2	CH2
AD3, ADVREFN	–	CH3	CH2
AD4, ADVREFN	AD4, AD5	CH4	CH4
AD5, ADVREFN	–	CH5	CH4
AD6, ADVREFN	AD6, AD7	CH6	CH6
AD7, ADVREFN	–	CH7	CH6

In Pseudo-Differential mode, inputs are managed by a 8/2:1-channel analog multiplexer. See the table below.

Table 9-7. Input Pins and Channel Numbers in Pseudo-Differential Mode
Internal ADC Inputs (VIN+, VIN-)	Channel Number
AD0, AD7	CH0
AD1, AD7	CH1
AD2, AD7	CH2
AD3, AD7	CH3
AD4, AD7	CH4
AD5, AD7	CH5
AD6, AD7	CH6
GNDANA, AD7	CH7

Figure 9-31. Analog Full Scale Ranges in Single-Ended/Pseudo-Differential/Differential Applications