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Arm® Arm926EJ-S™ Processor-Based MPU, 800 MHz, MIPI DSI® or CSI-2, LVDS, RGB, 2D Graphics, Gigabit Ethernet with TSN, CAN-FD, Octal/Quad SPI, Crypto, PUF
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4
System Controller
4.1
Overview
Introduction
Reference Document
1
Overview
2
CPU and Interconnect
3
Memories
4
System Controller
4.1
Overview
4.1.1
Block Diagram
4.1.2
Components
4.1.3
Product Dependencies
4.1.4
Special Functions in SFR
4.2
System Controller Write Protection (SYSCWP)
4.3
Advanced Interrupt Controller (AIC)
4.4
Boot Sequence Controller (BSC)
4.5
General Purpose Backup Registers (GPBR)
4.6
Watchdog Timer (WDT)
4.7
Reset Controller (RSTC)
4.8
Real-Time Timer (RTT)
4.9
Real-Time Clock (RTC)
4.10
Shutdown Controller (SHDWC)
4.11
Periodic Interval Timer (PIT)
4.12
64-bit Periodic Interval Timer (PIT64B)
4.13
Debug Unit (DBGU)
4.14
Special Function Registers (SFR)
4.15
Slow Clock Controller (SCKC)
4.16
Clock Generator
4.17
Power Management Controller (PMC)
4.18
Parallel Input/Output Controller (PIO)
5
Image Subsystem
6
Audio Subsystem
7
Security and Cryptography Subsystem
8
Connectivity Subsystem
9
USB Subsystem
10
Electrical and Mechanical Characteristics
11
Revision History
Microchip Information
4.1 Overview
