Arm® Arm926EJ-S™ Processor-Based MPU, 800 MHz, MIPI DSI® or CSI-2, LVDS, RGB, 2D Graphics, Gigabit Ethernet with TSN, CAN-FD, Octal/Quad SPI, Crypto, PUF

Reference Document

1.2 Ordering Information

1.3 Product Identification System

1.5 Configuration Summary

1.6 Block Diagram

1.7 Signal Description

1.8 Package and Pinout

1.9 Microchip Recommended Power Management Solutions

1.10 Safety and Security Features

1.11 Memory Mapping

1.12 Peripheral Identifiers

2 CPU and Interconnect

2.1 Arm926EJ-S Processor

2.2 Debug and Test

2.3 Bus Matrix (MATRIX)

2.4 DMA Controller (XDMAC)

2.5 Boot Strategies

3.2 External Bus Interface (EBI)

3.3 Static Memory Controller (SMC)

3.4 Programmable Multibit Error Correction Code Controller (PMECC)

3.5 Programmable Multibit ECC Error Location Controller (PMERRLOC)

3.6 DDR-SDRAM Controller (MPDDRC)

3.7 OTP Memory Controller (OTPC)

4 System Controller

4.2 System Controller Write Protection (SYSCWP)

4.3 Advanced Interrupt Controller (AIC)

4.4 Boot Sequence Controller (BSC)

4.5 General Purpose Backup Registers (GPBR)

4.6 Watchdog Timer (WDT)

4.7 Reset Controller (RSTC)

4.8 Real-Time Timer (RTT)

4.9 Real-Time Clock (RTC)

4.10 Shutdown Controller (SHDWC)

4.11 Periodic Interval Timer (PIT)

4.12 64-bit Periodic Interval Timer (PIT64B)

4.13 Debug Unit (DBGU)

4.14 Special Function Registers (SFR)

4.15 Slow Clock Controller (SCKC)

4.16 Clock Generator

4.17 Power Management Controller (PMC)

4.18 Parallel Input/Output Controller (PIO)

5 Image Subsystem

5.2 LCD Controller (LCDC)

5.3 Low Voltage Differential Signaling Controller (LVDSC)

5.4 2D Graphics Engine (GFX2D)

5.5 Display Serial Interface (DSI)

5.6 Camera Serial Interface (CSI)

5.7 CSI-2 Demultiplexer Controller (CSI2DC)

5.8 Image Sensor Controller (ISC)

6 Audio Subsystem

6.2 Audio Class D Amplifier (CLASSD)

6.3 Inter-IC Sound Multi-Channel Controller (I2SMCC)

6.4 Synchronous Serial Controller (SSC)

7 Security and Cryptography Subsystem

7.2 Advanced Encryption Standard (AES)

7.3 Secure Hash Algorithm (SHA)

7.4 Triple Data Encryption Standard (TDES)

7.5 Random Number Generator (TRNG)

7.6 Physical Unclonable Functions (PUF)

8 Connectivity Subsystem

8.2 Ethernet MAC (GMAC)

8.3 Flexible Serial Communication Controller (FLEXCOM)

8.4 Quad Serial Peripheral Interface (QSPI)

8.5 Secure Digital MultiMedia Card Controller (SDMMC)

8.6 Controller Area Network (MCAN)

8.7 Timer Counter (TC)

8.8 Pulse Width Modulation Controller (PWM)

9 USB Subsystem

9.2 USB Device High Speed Port (UDPHS)

9.3 USB Host High Speed Port (UHPHS)

9.4 Analog-to-Digital Controller (ADC)

10 Electrical and Mechanical Characteristics

10.1 Electrical Characteristics

10.2 Mechanical Characteristics

11 Revision History

11.1 Revision History

Microchip Information

Microchip Devices Code Protection Feature

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