2.3 Memories

The AVR architectures have two main memory spaces: The Data Memory and the Program Memory. The CPU Data Memory space allows faster access and is accessible using LD/ST instructions in assembly, while the Program Memory space (code space) is accessible through LPM/SPM instructions.

For the megaAVR devices, the first 4352 bytes from Data Memory are reserved for the Register file, the I/O memory, the extended I/O memory, and the internal data SRAM. The first 32 locations are used to access the Register file, and the next 64 locations access the standard I/O memory, then 160 locations of extended I/O memory, and the next 4096 locations access the internal data SRAM.

For the megaAVR devices with at least 64 KB Flash memory, an external memory interface is available for interfacing with other devices. This external interface allows the access of an area in the remaining address locations up to the 64 KB address space. This area starts at the address following the internal SRAM.

For the AVR Dx devices, the peripherals, SRAM, EEPROM and the I/O registers are all located in the Data Memory space, while the Flash is located in the Program Memory space. The Flash memory can be also mapped into the Data Memory space in blocks of 32 KB.

Unlike the megaAVR devices, the AVR Dx devices do not have support for the external memory interface.