2.5.2.1 TCB in Input Capture on Event Mode

In this mode, the counter will count from BOTTOM to MAX continuously. When an event is detected, the CNT is transferred to the Capture/Compare (TCBn.CCMP) register, and a CAPT interrupt and event is generated. This mode can be used, but not limited, to measure the interval between successive events.

Since the counter is working continuously, the Overflow (OVF) bit from the TCBn.INTFLAGS register is used to signalize that. It is the user’s responsibility to take into account when the overflow appears between successive events.

AVR® Dx - TCB initialization for Input Capture on Event Mode

void TCB2_Init(void)
{
	TCB2.CTRLB = 0 << TCB_ASYNC_bp       /* Asynchronous Enable: disabled */
	             | 0 << TCB_CCMPEN_bp    /* Pin Output Enable: disabled */
	             | 0 << TCB_CCMPINIT_bp  /* Pin Initial State: disabled */
	             | TCB_CNTMODE_CAPT_gc;  /* Input Capture Event */

	TCB2.EVCTRL = 1 << TCB_CAPTEI_bp    /* Event Input Enable: enabled */
	              | 0 << TCB_EDGE_bp    /* Event Edge: positive */
	              | 0 << TCB_FILTER_bp; /* Input Capture Noise Cancellation Filter: disabled */

	TCB2.INTCTRL = 1 << TCB_CAPT_bp     /* Capture or Timeout: enabled */
	               | 0 << TCB_OVF_bp;   /* OverFlow Interrupt: disabled */

	TCB2.CTRLA = TCB_CLKSEL_DIV1_gc     /* CLK_PER */
	             | 1 << TCB_ENABLE_bp   /* Enable: enabled */
	             | 0 << TCB_RUNSTDBY_bp /* Run Standby: disabled */
	             | 0 << TCB_SYNCUPD_bp  /* Synchronize Update: disabled */
	             | 0 << TCB_CASCADE_bp; /* Cascade Two Timer/Counters: disabled */
}