19.6.3.6 Regulators, RAMs, and NVM State in Sleep Mode

By default, in Standby Sleep mode and backup sleep mode, the RAMs, NVM, and regulators are automatically set in Low-Power mode to reduce power consumption:

The RAM is in Low-Power mode if the device is in standby mode. Refer to RAM Automatic Low Power Mode for details.
Non-Volatile Memory - the NVM is automatically set in low power mode in these conditions:
- When the device is in Standby Sleep mode and the NVM is not accessed. This behavior can be changed by software by configuring the SLEEPPRM bit group of the CTRLB register in the NVMCTRL peripheral.
- When the device is in Idle Sleep mode and the NVM is not accessed. This behavior can be changed by software by configuring the SLEEPPRM bit group of the CTRLB register in the NVMCTRL peripheral.
Regulators: by default, in Standby Sleep mode, the PM analyzes the device activity to use either the main or the low-power voltage regulator to supply the VDDCORE.

GCLK clocks, regulators and RAM are not affected in Idle Sleep mode and will operate as normal.

Table 19-3. Regulators, RAMs, and NVM state in Sleep Mode
Sleep Mode	SRAM Mode⁽¹⁾	NVM	Regulators
			VDDCORE		VDDBU
			main	ULP	VDDBU
Active	normal	normal	on	on	on
Idle	auto⁽²⁾	on	on	on	on
Standby - case 1	normal	auto⁽²⁾	auto⁽³⁾	on	on
Standby - case 2	low power	low power	auto⁽³⁾	on	on
Standby - case 3	low power	low power	auto⁽³⁾	on	on
Standby - case 4	low power	low power	off	on	on
Backup	off	off	off	off	on
Off	off	off	off	off	off

Note:

RAMs mode by default: STDBYCFG.BBIAS bits are set to their default value.
auto: by default, NVM is in low-power mode if not accessed.
auto: by default, the main voltage regulator is on if GCLK, APBx, or AHBx clock is running during SleepWalking.