2.1 Watchdog not disabled
When entering SAM-BA monitor, even after a USB enumeration by a host or reception of a character on the UART ROM code console, the Dual Watchdog Timer is not disabled.
As a consequence, the chip resets after the watchdog timeout elapses. A typical value is 16 seconds.
Work Around
Before the timeout elapses, write the WDDIS bit in PS_WDT_MR to disable the Dual Watchdog Timer.
Affected Silicon Revisions
| A0 | A0-D1G | A0-D2G | A1 | A1-D1G | A1-D2G | ||||||
| X | X | X | X | X | X |