8.1 Time Division Multiplexed Left Justified (TDMLJ) is not functional in Client mode
When the clock is enabled during a high level of the frame synchro signal (I2SMCC_WS) by writing I2SMCC_CR.CKEN = 1, the data alignment is incorrect.
Work Around
None.
Affected Device Revisions
|
A0 A0-D1G A0-D2G |
A1 A1-D5M A1-D1G A1-D2G A1-D4G | ||||||||||
| X | X |
