19.14.7 SLRCONx

Slew Rate Control Register
Important:
  • Refer to the “Pin Allocation Table” for details about pin availability per port
  • Unimplemented bits will read back as ‘0
Name: SLRCONx

Bit 76543210 
 SLRx7SLRx6SLRx5SLRx4SLRx3SLRx2SLRx1SLRx0 
Access R/WR/WR/WR/WR/WR/WR/WR/W 
Reset 11111111 

Bits 0, 1, 2, 3, 4, 5, 6, 7 – SLRxn Slew Rate Control on RX Pin

ValueDescription
1 PORT pin slew rate is limited
0 PORT pin slews at maximum rate
Refer to the “Pin Allocation Table” for details about pin availability per port Unimplemented bits will read back as ‘0’