19.14.6 INLVLx
Important:
- Refer to the “Pin Allocation Table” for details about pin availability per port
- Unimplemented bits will read back
as ‘
0’ -
Any peripheral using the I2C/I3C pins read the inputs selected using the RxyFEAT register
| Name: | INLVLx |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| INLVLx7 | INLVLx6 | INLVLx5 | INLVLx4 | INLVLx3 | INLVLx2 | INLVLx1 | INLVLx0 | ||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
| Reset | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
Bits 0, 1, 2, 3, 4, 5, 6, 7 – INLVLxn Input Level Select on RX Pin
| Value | Description |
|---|---|
1 |
Schmitt Trigger (ST, CMOS-Compatible) input used for port reads and interrupt-on-change |
0 |
Low-Voltage Buffer (LVBUF, TTL-Compatible) input used for port reads and interrupt-on-change |